Learning Fine-Grained Bimanual Manipulation with Low-Cost Hardware [PDF]
Fine manipulation tasks, such as threading cable ties or slotting a battery, are notoriously difficult for robots because they require precision, careful coordination of contact forces, and closed-loop visual feedback.
Tony Zhao+3 more
semanticscholar +1 more source
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design [PDF]
Modern hardware design starts with specifications provided in natural language. These are then translated by hardware engineers into appropriate Hardware Description Languages (HDLs) such as Verilog before synthesizing circuit elements.
Jason Blocklove+3 more
semanticscholar +1 more source
TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings [PDF]
In response to innovations in machine learning (ML) models, production workloads changed radically and rapidly. TPU v4 is the fifth Google domain specific architecture (DSA) and its third supercomputer for such ML models. Optical circuit switches (OCSes)
N. Jouppi+13 more
semanticscholar +1 more source
Hardware error correction for programmable photonics [PDF]
Programmable photonic circuits of reconfigurable interferometers can be used to implement arbitrary operations on optical modes, facilitating a flexible platform for accelerating tasks in quantum simulation, signal processing, and artificial intelligence.
S. Bandyopadhyay, R. Hamerly, D. Englund
semanticscholar +1 more source
Hardware-efficient variational quantum eigensolver for small molecules and quantum magnets [PDF]
Quantum computers can be used to address electronic-structure problems and problems in materials science and condensed matter physics that can be formulated as interacting fermionic problems, problems which stretch the limits of existing high-performance
A. Kandala+6 more
semanticscholar +1 more source
HAT: Hardware-Aware Transformers for Efficient Natural Language Processing [PDF]
Transformers are ubiquitous in Natural Language Processing (NLP) tasks, but they are difficult to be deployed on hardware due to the intensive computation.
Hanrui Wang+6 more
semanticscholar +1 more source
FBNet: Hardware-Aware Efficient ConvNet Design via Differentiable Neural Architecture Search [PDF]
Designing accurate and efficient ConvNets for mobile devices is challenging because the design space is combinatorially large. Due to this, previous neural architecture search (NAS) methods are computationally expensive.
Bichen Wu+9 more
semanticscholar +1 more source
A Survey on Efficient Convolutional Neural Networks and Hardware Acceleration
Over the past decade, deep-learning-based representations have demonstrated remarkable performance in academia and industry. The learning capability of convolutional neural networks (CNNs) originates from a combination of various feature extraction ...
Deepak Ghimire+2 more
semanticscholar +1 more source
HAQ: Hardware-Aware Automated Quantization With Mixed Precision [PDF]
Model quantization is a widely used technique to compress and accelerate deep neural network (DNN) inference. Emergent DNN hardware accelerators begin to support mixed precision (1-8 bits) to further improve the computation efficiency, which raises a ...
Kuan Wang+4 more
semanticscholar +1 more source
Research on the Construction of Virtual Simulation Training System for Intelligent Manufacturing Based on Outcomes - Based Education Concept [PDF]
Outcomes-Based Education (OBE) is the core concept of professional accreditation in engineering education, and is a teaching and learning approach that determines teaching strategies based on learning outcomes.
Zhao JiaQi+6 more
doaj +1 more source