Results 31 to 40 of about 1,045,218 (288)
Electronic matrix addressed displays capable of presenting arbitrary grayscale images typically require complex device architectures including switching components to provide unique pixel addressability.
Peter Andersson Ersman+3 more
doaj +1 more source
Hardware-efficient variational quantum algorithms for time evolution [PDF]
Parameterized quantum circuits are a promising technology for achieving a quantum advantage. An important application is the variational simulation of time evolution of quantum systems. To make the most of quantum hardware, variational algorithms need to
Marcello Benedetti+2 more
semanticscholar +1 more source
SqueezeNext: Hardware-Aware Neural Network Design [PDF]
One of the main barriers for deploying neural networks on embedded systems has been large memory and power consumption of existing neural networks. In this work, we introduce SqueezeNext, a new family of neural network architectures whose design was ...
A. Gholami+7 more
semanticscholar +1 more source
Hardware Information Flow Tracking
Information flow tracking (IFT) is a fundamental computer security technique used to understand how information moves through a computing system. Hardware IFT techniques specifically target security vulnerabilities related to the design, verification ...
Wei Hu+2 more
semanticscholar +1 more source
Placing Multimode Streaming Applications on Dynamically Partially Reconfigurable Architectures
By means of partial reconfiguration, parts of the hardware can be dynamically exchanged at runtime. This allows that streaming application running in different modes of the systems can share resources.
S. Wildermann+3 more
doaj +1 more source
Spherical harmonic covariance and magnitude function encodings for beamformer design
Microphone and speaker array designs have increasingly diverged from simple topologies due to diversity of physical host geometries and use cases. Effective beamformer design must now account for variation in the array’s acoustic radiation pattern ...
Yuancheng Luo
doaj +1 more source
Hardware implementation of memristor-based artificial neural networks
Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel.
F. Aguirre+30 more
semanticscholar +1 more source
A Trustworthy Classification Model for Intelligent Building Fire Risk
The occurrence of intelligent building fires causes huge economic losses to the country and society, and even people’s safety. It is necessary to accurately assess the degree of intelligent building fire risk so that the fire emergency management ...
Weilin Wu, Yixiang Chen
doaj +1 more source
Domain-specific hardware accelerators
DSAs gain efficiency from specialization and performance from parallelism.
W. Dally, Yatish Turakhia, Song Han
semanticscholar +1 more source
Hematic Pseudocyst Masquerading as Orbital Cellulitis and Sinusitis
Hematic pseudocysts are fibrous, nonepithelial lined capsules containing blood byproducts that typically present remotely following orbital fracture hardware implantation.
Ryan Larochelle+2 more
doaj +1 more source