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Hardware Skills for Hardware Engineers
Proceedings of the Canadian Engineering Education Association (CEEA), 2018 Electrical engineering students at the University of Waterloo require opportunities to develop hardware workflow skills. For example, creating, populating, and debugging printed circuit boards. Students may be fortunate enough to gain these skills on co-op work terms, but there is no structured on-campus opportunity to learn these topics.
Derek Wright, Arrchana Pradeepan
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Hardware-efficient variational quantum algorithms for time evolution [PDF]
Physical Review Research, 2020 Parameterized quantum circuits are a promising technology for achieving a quantum advantage. An important application is the variational simulation of time evolution of quantum systems. To make the most of quantum hardware, variational algorithms need to
Marcello Benedetti +2 more
semanticscholar +1 more source
SqueezeNext: Hardware-Aware Neural Network Design [PDF]
2018 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW), 2018 One of the main barriers for deploying neural networks on embedded systems has been large memory and power consumption of existing neural networks. In this work, we introduce SqueezeNext, a new family of neural network architectures whose design was ...
A. Gholami +7 more
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Hardware Information Flow Tracking
ACM Computing Surveys, 2021 Information flow tracking (IFT) is a fundamental computer security technique used to understand how information moves through a computing system. Hardware IFT techniques specifically target security vulnerabilities related to the design, verification ...
Wei Hu +2 more
semanticscholar +1 more source
Placing Multimode Streaming Applications on Dynamically Partially Reconfigurable Architectures
International Journal of Reconfigurable Computing, 2012 By means of partial reconfiguration, parts of the hardware can be dynamically exchanged at runtime. This allows that streaming application running in different modes of the systems can share resources.
S. Wildermann +3 more
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Spherical harmonic covariance and magnitude function encodings for beamformer design
EURASIP Journal on Audio, Speech, and Music Processing, 2021 Microphone and speaker array designs have increasingly diverged from simple topologies due to diversity of physical host geometries and use cases. Effective beamformer design must now account for variation in the array’s acoustic radiation pattern ...
Yuancheng Luo
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The evolvability of programmable hardware [PDF]
Journal of The Royal Society Interface, 2010 In biological systems, individual phenotypes are typically adopted by multiple genotypes. Examples include protein structure phenotypes, where each structure can be adopted by a myriad individual amino acid sequence genotypes. These genotypes form vast connected ‘neutral networks’ in genotype space.
Andreas Wagner +4 more
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Hardware implementation of memristor-based artificial neural networks
Nature CommunicationsArtificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel.
F. Aguirre +30 more
semanticscholar +1 more source
Domain-specific hardware accelerators
Communications of the ACM, 2020 DSAs gain efficiency from specialization and performance from parallelism.
W. Dally, Yatish Turakhia, Song Han
semanticscholar +1 more source
A Survey on Split Manufacturing: Attacks, Defenses, and Challenges
IEEE Access, 2020 In today's integrated circuit (IC) ecosystem, owning a foundry is not economically viable, and therefore most IC design houses are now working under a fabless business model.
Tiago D. Perez, Samuel Pagliarini
doaj +1 more source