Double‐Transition‐Metal MXenes: Multimetallic 2D Platforms for Next‐Generation Biomedicine
The present work explores recent progress in double‐transition‐metal MXenes and focuses on their potential as multifunctional biomedical nanoplatforms whose tunable optical, electronic, mechanical, and surface properties enable imaging, theranostics, antimicrobial activity, biosensing, tissue engineering, and drug delivery.
Parsa Namakiaraghi +2 more
wiley +1 more source
Editorial: Hardware implementation of spike-based neuromorphic computing and its design methodologies. [PDF]
Zhang L, Chan M.
europepmc +1 more source
Stanford Tech Report (2005), pp. 1--6
This paper describes the hardware F-Buffer implementation featured in the latest ATI graphics processors. We discuss the implementation choices made in each chip and the various implementation challenges faced like overflow handling.
Mike Houston +3 more
core
A committee machine gas identification system based on dynamically reconfigurable FPGA
This paper proposes a gas identification system based on the committee machine (CM) classifier, which combines various gas identification algorithms, to obtain a unified decision with improved accuracy.
Amira, A +4 more
core +1 more source
Weaving Intelligence: Thermally Drawn Multimaterial Fibers Toward AI‐Enabled Smart Textiles
Thermally drawn multimaterial fibers are rapidly advancing as intelligent structural units for next‐generation smart textiles. Integrating multimaterial architectures with neuromorphic and spiking‐neural‐network principles enables fabrics that can sense, compute, and adapt autonomously.
Vuong Dinh Trung +9 more
wiley +1 more source
Energy-Efficient Hardware Implementation of Fully Connected Artificial Neural Networks Using Approximate Arithmetic Blocks. [PDF]
Esmali Nojehdeh M, Altun M.
europepmc +1 more source
Designable van der Waals Crystal for Artificial Neuronal Cell Mimicking
Designable van der Waals crystal has been demonstrated for device‐scale neuronal cell mimicking. The structural similarity between ion‐channel in biological membranes and layered vdW lattices is realized with nano‐crystallization via Ar + H2S plasma sulfurization.
Jinhyoung Lee +23 more
wiley +1 more source
BAM-Net: Hardware Friendly Associative Memory Using Binary Dominant Weights and NAND Logic
This paper presents BAM-Net, a hardware-efficient binarization algorithm designed for associative memory (AM) implementation. BAM-Net aims to reduce memory overhead, power consumption, and implementation complexity.
Abdolah Amirany +4 more
doaj +1 more source
Highly-scaled and fully-integrated 3-dimensional ferroelectric transistor array for hardware implementation of neural networks. [PDF]
Kim IJ, Kim MK, Lee JS.
europepmc +1 more source
Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation
Langen D, Niemann J-C, Porrmann M, Kalte H, Rückert U. Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation. In: Proceedings of the IEEE-Workshop: Heterogeneous reconfigurable Systems on Chip (SoC).
Mario Porrmann +9 more
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