Results 111 to 120 of about 173,402 (304)

Large‐Area 2D Metasurface‐Based Triboelectric E‐Skin Arrays: Contact & Proximity Tactile Mapping with Broadband Acoustic Readouts

Advanced Materials, EarlyView.
Metasurface‐engineered NC‐TENG arrays integrate tactile pressure mapping, non‐contact gesture sensing, and acoustic signal readouts in one ultrathin module, and outperforms pristine PDMS in terms of electrical output and real‐time spatial mapping for next‐gen wearables.
Injamamul Arief, Swagato Sarkar, Anik Kumar Ghosh, Osvalds Verners, Kamal Kumar Meena, Su‐Hyeong Lee, Soosang Chae, Tobias A. F. König, Beate Krause, Andreas Fery, Mehmet Sait Özer, Anindya Nag, Amit Das   +12 more
wiley   +1 more source

All‐Optical Reconfigurable Physical Unclonable Function for Sustainable Security

Advanced Materials, EarlyView.
An all‐optical reconfigurable physical unclonable function (PUF) is demonstrated using plasmonic coupling–induced sintering of optically trapped gold nanoparticles, where Brownian motion serves as a robust entropy source. The resulting optical PUF exhibits high encoding density, strong resistance to modeling attacks, and practical authentication ...
Jang‐Kyun Kwak, Changgyun Moon, Hyun‐Bin Yu, Sunkook Kim, Dong‐Hwan Kim   +4 more
wiley   +1 more source

32-Bit Fixed and Floating-Point Hardware Implementation for Enhanced Inverter Control: Leveraging FPGA in Recurrent Neural Network Applications

IEEE Access
Traditional microcontroller-based control systems increasingly face limitations due to their restricted capabilities and lack of parallel processing, creating bottlenecks in real-time energy optimization.
Chanakya Hingu, Xingang Fu, Praneeth Vangala, Ramkrishna Mishan, Poria Fajri   +4 more
doaj   +1 more source

Extrinsic evolution of finite state machine

, 2002
The paper outlines the use of the extrinsic evolvable hardware approach to evolve finite state machines (FSM). Both the genetic algorithm (GA) and Evolvable Hardware (EHW) are combined together to produce optimal logic circuit. GA is used to optimise the
A. E. A. Almaini, A. Belgasem, Almaini, A, Belgasem, A, Kalganova, T, T. Kalganova   +5 more
core   +1 more source

Neuromorphic Electronics for Intelligence Everywhere: Emerging Devices, Flexible Platforms, and Scalable System Architectures

Advanced Materials, EarlyView.
The perspective presents an integrated view of neuromorphic technologies, from device physics to real‐time applicability, while highlighting the necessity of full‐stack co‐optimization. By outlining practical hardware‐level strategies to exploit device behavior and mitigate non‐idealities, it shows pathways for building efficient, scalable, and ...
Kapil Bhardwaj, Roshni Satheesh Babu, Yuxin Xia, Eva Bestelink, Radu Sporea, Nikos Hastas, Ioannis Zeimpekis, Dimitra G. Georgiadou, Sayani Majumdar   +8 more
wiley   +1 more source

Full hardware implementation of neuromorphic visual system based on multimodal optoelectronic resistive memory arrays for versatile image processing. [PDF]

Nat Commun, 2023
Zhou G, Li J, Song Q, Wang L, Ren Z, Sun B, Hu X, Wang W, Xu G, Chen X, Cheng L, Zhou F, Duan S.   +12 more
europepmc   +1 more source

A Hardware Implementation of Face Detection

, 2007
Face detection is the process of locating the position where faces are present in an image.Currently, software-based face detection is hard to support real-time video streams in an embedded processor.
林恩楷, Lin, En-Kai
core  

Path‐Decoupled Cation‐Eutaxy III–V van der Waals Memristive Semiconductors for Mitigating the Neuromorphic Accuracy‐Energy Trade‐off

Advanced Materials, EarlyView.
Path‐decoupled III–V van der Waals memtransistors spatially separate ionic and electronic transport to overcome the conventional trade‐off between accuracy and energy in neuromorphic hardware. Mobile K+ ions in the vdW gaps set a wide conductance window, Gmax/Gmin, while gate‐tunable hole conduction lowers programming energy, enabling reliable ...
Jihong Bae, Ji Hoon Han, Taeyoung Kim, Jongbum Won, Seokmin Park, Gyu Won Kim, Sungsoon Kim, Hong Choi, Taehoon Kim, Hong‐Sub Lee, Jae‐Hyun Lee, Young Jin Choi, Jinwoo Cheon, Wooyoung Shim   +13 more
wiley   +1 more source

Hardware implementation of Bayesian network based on two-dimensional memtransistors. [PDF]

Nat Commun, 2022
Zheng Y, Ravichandran H, Schranghamer TF, Trainor N, Redwing JM, Das S.   +5 more
europepmc   +1 more source

Hardware-in-the-loop Rendezvous Simulation using a Vision Based Sensor

, 2011
One of the critical issues of a satellite On-Orbit Servicing (OOS) mission is to ensure a safe and reliable Rendezvous and Docking (RvD) process. This most risky part of the mission must be carefully analyzed, simulated and verified before the mission ...
Boge , Toralf, Tzschichholz, Tristan, Benninghoff , Heike   +2 more
core