Results 91 to 100 of about 4,696,608 (299)
FPGA Implementation of Nerve Cell Using Izhikevich Neuronal Model as Spike Generator (SG)
The neuron is sometimes referred to as the “head” or “central” cell of the nervous system since it has the ability to communicate with other neurons or cells via electrical impulses.
Mohammed Tariqul Islam +5 more
doaj +1 more source
Elastomeric micropillars bend under contact loading, sliding microscale devices out of alignment during transfer printing. A hybrid PDMS stamp embeds a high‐modulus skeleton within each pillar while retaining a compliant contact surface. The reinforcement confines pillar deformation, suppressing interfacial sliding and preserving array registration on ...
Seol Ahn +8 more
wiley +1 more source
Hardware Implementations of Fixed-Point Atan2
—The atan2 function computes the polar angle arctan(x/y) of a point given by its cartesian coordinates. It is widely used in digital signal processing to recover the phase of a signal. This article studies for this context the implementation of atan2 with fixed-point inputs and outputs.
de Dinechin, Florent, Istoan, Matei
openaire +4 more sources
Hardware-based text-to-braille translator
This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, thecircuit presented is able to carry out text-to-Braille ...
Iain Murray (3637420) +2 more
core
NeuroVisio SyncPatch integrates skin‐conformal electromyography (EMG) electrodes with camera‐tracked markers to jointly assess muscle activity and three‐dimensional knee kinematics during rehabilitation. Parallel feedback pathways provide real‐time kinematic guidance during movement and post‐trial neuromuscular feedback.
Bohyung Choi +11 more
wiley +1 more source
Ferroelectric Quantum Dots for Retinomorphic In‐Sensor Computing
This work has provided a protocol for fabricating retinomorphic phototransistors by integrating ferroelectric ligands with quantum dots. The resulting device combines ferroelectricity, optical responsiveness, and low‐power operation to enable adaptive signal amplification and high recognition accuracy under low‐light conditions, while supporting ...
Tingyu Long +26 more
wiley +1 more source
Stanford Tech Report (2005), pp. 1--6
This paper describes the hardware F-Buffer implementation featured in the latest ATI graphics processors. We discuss the implementation choices made in each chip and the various implementation challenges faced like overflow handling.
Mike Houston +3 more
core
Bioinspired Adaptive Sensors: A Review on Current Developments in Theory and Application
This review comprehensively summarizes the recent progress in the design and fabrication of sensory‐adaptation‐inspired devices and highlights their valuable applications in electronic skin, wearable electronics, and machine vision. The existing challenges and future directions are addressed in aspects such as device performance optimization ...
Guodong Gong +12 more
wiley +1 more source
Coupling Heterogeneous Neural Networks With Memristors
This paper proposes a novel approach for cascading Hopfield and Hindmarsh-Rose neural networks using memristive synapses. The model integrates two distinct neural networks, each consisting of two identical neurons.
Li Zhang +4 more
doaj +1 more source
A Hardware Implementation of Face Detection
Face detection is the process of locating the position where faces are present in an image.Currently, software-based face detection is hard to support real-time video streams in an embedded processor.
林恩楷, Lin, En-Kai
core

