Results 71 to 80 of about 173,402 (304)

Oxidized MoS2‐Based Multifunctional Memristive Hardware for Energy‐Efficient mmWave Signal Processing and In‐Memory Matrix Multiplication

open access: yesAdvanced Functional Materials, EarlyView.
Thermally oxidized MoS2‐based radio‐frequency switches enable a multifunctional platform that unifies broadband RF switching and in‐memory computation. The device achieves a cutoff frequency of 33.2 THz with high energy efficiency and supports hardware‐aware signal processing.
Juho Son   +5 more
wiley   +1 more source

A Low-Power Hardware-Friendly Binary Decision Tree Classifier for Gas Identification

open access: yesJournal of Low Power Electronics and Applications, 2011
In this paper, we present a hardware friendly binary decision tree (DT) classifier for gas identification. The DT classifier is based on an axis-parallel decision tree implemented as threshold networks—one layer of threshold logic units (TLUs) followed ...
Qingzheng Li, Amine Bermak
doaj   +1 more source

A Hardware Generator of Multi-point Distributed Random Numbers for Monte Carlo Simulation [PDF]

open access: yes
Monte Carlo simulation of weak approximations of stochastic differential equations constitutes an intensive computational task. In applications such as finance, for instance, to achieve "real time" execution, as often required, one needs highly efficient
Filippo Martini   +3 more
core  

Low‐Profile, High‐Gain GRIN RF Lenses via Multi‐Material Vat Photopolymerization

open access: yesAdvanced Functional Materials, EarlyView.
We investigate the opportunity of leveraging multi‐material vat photopolymerization printing to manufacture intricate lenses exhibiting permittivity gradients that can increase signal gain in transmitted radiofrequency signals in the X‐ and Ku‐bands. Lenses produced with more distinct low‐loss materials (up to 5) can deliver an 18 dB signal gain with a
Lawrence Romangsuriat   +3 more
wiley   +1 more source

Hardware Implementation of Digital Base Band Videophone

open access: yesTongxin xuebao, 1995
The design and realization of 64kb/s digital monochrome videophone,which has been implemented in hardware,is discussed in this paper.The structure graph of hardware system,as well as flowsheet of control software in codec is showed.
秦仁忠, 孟焱, 张家谋
doaj   +2 more sources

Dynamically reconfigurable hardware for embedded control systems

open access: yes, 2012
Paiz Gatica CV. Dynamically reconfigurable hardware for embedded control systems. Bielefeld: Universität; 2012.This thesis explores the use of dynamically reconfigurable hardware for the realisation of embedded control systems, using the most well-known ...
Paiz Gatica, Carlos Vladimir
core  

The hardware implementation of an artificial neural network using stochastic pulse rate encoding principles [PDF]

open access: yes, 1995
In this thesis the development of a hardware artificial neuron device and artificial neural network using stochastic pulse rate encoding principles is considered.
Glover, John Sigsworth
core  

Thermally Pre‐Formed Reconfigurable Resistive Random‐Access Memory Crossbar Arrays: A Dual‐Mode Platform for Robust Physically Unclonable Functions and In‐Memory Computing

open access: yesAdvanced Functional Materials, EarlyView.
A reconfigurable RRAM platform utilizing thermally pre‐formed filaments (TPFs) is developed to realize robust hardware security. By exploiting the thermodynamic stochasticity of TPFs, exceptionally reliable physically unclonable functions (PUFs) are achieved.
Seongbin Kwon   +4 more
wiley   +1 more source

Ultrasensitive Detection of Porcine Epidemic Diarrhea Virus Infections Using Multivalent DNA Nanostructure‐Enabled Lateral Flow Assay

open access: yesAdvanced Healthcare Materials, EarlyView.
A multivalent DNA nanostructure‐enabled lateral flow assay was developed for rapid, ultrasensitive detection of porcine epidemic diarrhea virus (PEDV) nucleocapsid protein. Designer net‐shaped DNA nanostructures (DNA‐Net) presenting PEDV‐specific aptamers achieved ~1000‐fold enhanced binding, enabling detection of viral copies with Ct ≤ 37.42 within 10
Saurabh Umrao   +9 more
wiley   +1 more source

Design and implementation of parallel CRC algorithm for fibre channel on FPGA

open access: yesThe Journal of Engineering, 2019
Fibre channel (FC) provides the high-speed and low-latency communication between the end systems, widely used in data storage, aerospace applications and large electronic equipment including radar systems.
Wu Chuxiong, Shi Haifeng
doaj   +1 more source

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