Results 51 to 60 of about 173,402 (304)
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone +11 more
wiley +1 more source
MATHEMATICAL MODEL OF AN ARTIFICIAL NEURAL NETWORK FOR SOLVING DATA MINING PROBLEMS
Background. The article discusses a neural network (artificial neural network) as a kind of mathematical model. Also, the work analyzes its software and hardware implementation. Materials and methods.
A.D. Tulegulov +4 more
doaj +1 more source
Optoelectronic synaptic devices based on solution‐processed molecular telluride GST‐225 phase‐change inks are demonstrated for three‐factor learning. A global optical signal broadcast through a silicon waveguide induces non‐volatile conductance updates exclusively in locally electrically flagged memristors.
Kevin Portner +14 more
wiley +1 more source
Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware
The implementation of large linear control systems requires a high amount of digital signal processing. Here, we show that reconfigurable hardware allows the design of fast yet flexible control systems.
Marcus Bednara +5 more
doaj +1 more source
A hardware implementation of capability-based addressing [PDF]
The SWARD architecture, an experimental higher-level architecture, contains the naming and protection concept of capability-based addressing. After discussing the merits of capability-based addressing, its general representation in the SWARD architecture is discussed.
Glenford J. Myers, B. R. S. Buckingham
openaire +1 more source
Field‐free spin‐orbit torque domain‐wall synapses integrated with stochastic MTJ neurons enable compact hardware Boltzmann machines. Leveraging intrinsic stochasticity and multi‐level conductance, the system achieves efficient probabilistic learning with high accuracy, demonstrating a scalable spintronic platform for energy‐efficient edge AI.
Aijaz H. Lone +8 more
wiley +1 more source
A quantum dot–tellurium thin‐film photodetector autonomously discriminates visible and infrared wavelengths through polarity‐reversible photoresponses. Engineered carrier separation and gain modulation enable filter‐free multispectral sensing within a single‐device architecture.
Yong Min Lee +7 more
wiley +1 more source
Color Edge Detection Hardware based on Geometric Algebra.
Modern techniques treat color images as separate monochrome images for processing. Partly, because there is no straightforward generalization of linear filters available for color.
B. Mishra +5 more
core +1 more source
3D Printing Innovations in Polymeric Porous and Patterned Architecture
Polymeric foams occupy a unique structural space between dense solids and open networks, where engineered void fraction governs mechanical compliance, thermal resistance, and mass transport. Additive manufacturing now enables precise spatial control over cellular architecture, unlocking designer foam structures across applications spanning crash ...
Dhanush Patil +13 more
wiley +1 more source
Symbolic Noise Analysis Approach to Computational Hardware Optimization [PDF]
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical algorithms always results in an optimization problem of trading computational
Ahmadi, Arash +3 more
core +1 more source

