Results 51 to 60 of about 4,696,608 (299)
High-Performance Hardware Implementation of MPCitH and Picnic3
Picnic is a post-quantum digital signature, the security of which relies solely on symmetric-key primitives such as block ciphers and hash functions instead of number theoretic assumptions. One of the main concerns of Picnic is the large signature size.
Guoxiao Liu +3 more
doaj +1 more source
FPGA-Based Implementation of Size-Adaptive Privacy Amplification in Quantum Key Distribution
In a quantum key distribution (QKD) system, privacy amplification (PA) is an essential procedure that can effectively eliminate the leaked information to an eavesdropper and distill a secret key.
Shen-Shen Yang +3 more
doaj +1 more source
This review revisits optoelectronic neuromorphic devices that extend from unimodal sensing toward multimodal perception. Five types of stimuli‐to‐output information flow that are classified based on the device roles within the system and applications are summarized and discussed.
Jihyun Shin +6 more
wiley +1 more source
Hardware accelerated computer graphics algorithms [PDF]
The advent of shaders in the latest generations of graphics hardware, which has made consumer level graphics hardware partially programmable, makes now an ideal time to investigate new graphical techniques and algorithms as well as attempting to improve ...
Rhodes, Daniel Thomas, Rhodes, DT
core
Memristive‐Gated RC‐Delay Synaptic Transistors for Time‐Encoded Analog in‐Memory Computing
A Memristive‐Gated Transistor for Time‐Encoded Analog In‐Memory Computing — By exploiting the RC delay of a self‐rectifying interface‐type memristor, nonlinear I–V distortion is structurally bypassed, enabling 3‐bit nonvolatile memory, spike‐timing‐based analog encoding, and hardware‐calibrated reservoir‐computing validation within a unified device ...
Yun‐Seo Shin +7 more
wiley +1 more source
MATHEMATICAL MODEL OF AN ARTIFICIAL NEURAL NETWORK FOR SOLVING DATA MINING PROBLEMS
Background. The article discusses a neural network (artificial neural network) as a kind of mathematical model. Also, the work analyzes its software and hardware implementation. Materials and methods.
A.D. Tulegulov +4 more
doaj +1 more source
The physical realization of artificial neurons is a critical challenge for energy‐efficient neuromorphic computing. This review presents a comprehensive analysis of the evolution of artificial neuron implementations from conventional CMOS to emerging post‐CMOS technologies.
Kannan Udaya Mohanan +4 more
wiley +1 more source
A defect‐engineered Ag/Gd2O3:Nb2O5/Pt rare earth composite oxide memristor enables stable multilevel reservoir states through pulse driven conductance modulation. Experimentally measured device responses are incorporated into a device aware reservoir computing framework for CIFAR‐100 image classification, highlighting the potential of rare earth ...
Hammad Ghazanfar +9 more
wiley +1 more source
Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation [PDF]
Langen D, Niemann J-C, Porrmann M, Kalte H, Rückert U. Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation. In: Proceedings of the IEEE-Workshop: Heterogeneous reconfigurable Systems on Chip (SoC).
Mario Porrmann +9 more
core
Energy-efficient pipelined bloom filters for network intrusion detection [PDF]
Software-based detection techniques are commonly used to identify the predefined signatures in network streams. However, the software-based techniques can not keep up with the speeds that network bandwidth increases.
Kocak, Taskin +5 more
core +1 more source

