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Exploiting hardware obfuscation methods to prevent and detect hardware Trojans
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017Due to the globalized semiconductor supply chain, integrated circuits suffer from hardware security attacks. Among various attacks, hardware Trojan insertions have emerged as a major security concern. An adversary modifies the original circuit to accomplish the malicious intentions through the hardware Trojan. Hardware obfuscation has been demonstrated
Qiaoyan Yu
exaly +2 more sources
Hardware-Software Co-Design Based Obfuscation of Hardware Accelerators
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019Existing logic obfuscation approaches aim to protect hardware design IPs from SAT attack by increasing query count and output corruptibility of a locked netlist. In this paper, we demonstrate the ineffectiveness of such techniques to obfuscate hardware accelerator platforms.
Abhishek Chakraborty 0001 +1 more
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Development of a Layout-Level Hardware Obfuscation Tool
2015 IEEE Computer Society Annual Symposium on VLSI, 2015While hardware obfuscation has been used in industry for many years, very few scientific papers discuss layout-level obfuscation. The main aim of this paper is to start a discussion about hardware obfuscation in the academic community and point out open research problems. In particular, we introduce a very flexible layout-level obfuscation tool that we
Christof Paar
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On the optimization of Software Obfuscation against Hardware Trojans in Microprocessors
2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2022The quest of low production cost and short time-tomarket, as well as the complexity of modern integrated circuits pushed towards a globalization of the supply chain of silicon devices. Such production paradigm raised a number of security threats among which Hardware Trojan Horses (HTHs), that became a serious issue not only for academy but also for ...
Cassano, L +3 more
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VLSI Test and Hardware Security Background for Hardware Obfuscation
2017This chapter discusses the fundamental concepts of design and testing and their role in hardware obfuscation. It outlines the traditional design flow of integrated circuits and assesses the vulnerabilities associated with the verification techniques and testing structures that can expose the design details and help reverse-engineer the functionality. A
Jim Plusquellic +2 more
exaly +2 more sources
A Practical Logic Obfuscation Technique for Hardware Security
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016A number of studies of hardware security aim to thwart piracy, overbuilding, and reverse engineering (RE) by obfuscating and/or camouflaging. However, these techniques incur high overheads, and integrated circuit (IC) camouflaging cannot provide any protection for the gate-level netlist of the third party intellectual property (IP) core or the single ...
Jiliang Zhang
exaly +2 more sources
Hardware Obfuscation and Logic Locking: A Tutorial Introduction
IEEE Design & Test, 2020Editor’s note : If you are designing or integrating hardware IP blocks into your designs, and you are using common global supply chains, then reading this overview article on how to protect your IP against reverse engineering, piracy, and malicious alteration attacks is a must.
Tamzidul Hoque +2 more
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On the Construction of Composite Finite Fields for Hardware Obfuscation
IEEE Transactions on Computers, 2019Hardware obfuscation is a technique that modifies the circuit to hide the functionality. Obfuscations through algorithmic modifications add protection in addition to circuit-level techniques, and their effects on the data paths can be analyzed and controlled at the architectural level.
Xinmiao Zhang 0001, Yingjie Lao
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Circuit Design Obfuscation for Hardware Security
2018Nowadays, chip design and chip fabrication are normally conducted separately by independent companies. Most integrated circuit (IC) design companies are now adopting a fab-less model: they outsource the chip fabrication to offshore foundries while concentrating their effort and resource on the chip design.
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An Orthogonal Algorithm for Key Management in Hardware Obfuscation
2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 2019The globalization of supply chain makes semiconductor chips susceptible to various security threats. Design obfuscation techniques have been widely investigated to thwart intellectual property (IP) piracy attacks. Key distribution among IP providers, system integration team, and end users remains as a challenging problem.
Jiawei Wang +6 more
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