Results 31 to 40 of about 522,468 (334)
Weakening the Isolation Assumption of Tamper-proof Hardware Tokens [PDF]
Recent results have shown the usefulness of tamper-proof hardware tokens as a setup assumption for building UC-secure two-party computation protocols, thus providing broad security guarantees and allowing the use of such protocols as buildings blocks in ...
Dowsley, Rafael +2 more
core +2 more sources
A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL
Split manufacturing was introduced as an effective countermeasure against hardware-level threats such as IP piracy, overbuilding, and insertion of hardware Trojans.
Knechtel, Johann +3 more
core +1 more source
Ensuring Cyber-Security in Smart Railway Surveillance with SHIELD [PDF]
Modern railways feature increasingly complex embedded computing systems for surveillance, that are moving towards fully wireless smart-sensors. Those systems are aimed at monitoring system status from a physical-security viewpoint, in order to detect ...
DELLI PRISCOLI, Francesco +6 more
core +1 more source
The Pains of Hardware Security: An Assessment Model of Real-World Hardware Security Attacks
From military applications to everyday devices, hardware (HW) security is more relevant than ever before. The supply chain of integrated circuits is global and involves multiple actors, which facilitate the implementation of various attacks.
Sofia Maragkou +4 more
doaj +1 more source
This paper proposes two projector‐based Hopfield neural network (HNN) estimators for online, constrained parameter estimation under time‐varying data, additive disturbances, and slowly drifting physical parameters. The first is a constraint‐aware HNN that enforces linear equalities and inequalities (via slack neurons) and continuously tracks the ...
Miguel Pedro Silva
wiley +1 more source
Register transfer level hardware design information flow modeling and security verification method
Information flow analysis can effectively model the security behavior and security properties of hardware design. However, the existing gate level information flow analysis methods cannot deal with large-scale designs due to computing power and ...
QIN Maoyuan +4 more
doaj +1 more source
Towards Energy-Efficient and Secure Computing Systems
Countermeasures against diverse security threats typically incur noticeable hardware cost and power overhead, which may become the obstacle for those countermeasures to be applicable in energy-efficient computing systems.
Zhiming Zhang, Qiaoyan Yu
doaj +1 more source
On the Security Goals of White-Box Cryptography
We discuss existing and new security notions for white-box cryptography and comment on their suitability for Digital Rights Management and Mobile Payment Applications, the two prevalent use-cases of white-box cryptography.
Estuardo Alpirez Bock +3 more
doaj +1 more source
Hardware Trojan Detection and Mitigation in NoC using Key authentication and Obfuscation Techniques
Today's Multiprocessor System-on-Chip (MPSoC) contains many cores and integrated circuits. Due to the current requirements of communication, we make use of Network-on-Chip (NoC) to obtain high throughput and low latency.
Thejaswini P +5 more
doaj +1 more source
3D‐Printed Serial Snap‐Through Architectures for Programmable Mechanical Response
A serial snap‐through architecture is realized using compact 3D‐printed von Mises truss units arranged in a staged cascade. Their geometry and boundary conditions program multistage mechanical responses with plateaux and re‐hardening regimes. An inverted‐compliance model predicts these behaviors and enables analytical design of programmable force ...
Filipe A. Santos
wiley +1 more source

