Results 261 to 270 of about 1,129,007 (329)

Bounded distortion harmonic shape interpolation

ACM Transactions on Graphics, 2016
Planar shape interpolation is a classic problem in computer graphics. We present a novel shape interpolation method that blends C ∞ planar harmonic mappings represented in closed-form. The intermediate mappings in the blending are guaranteed to be locally injective C ∞
Chien, E., Chen, R., Weber, O.
openaire   +3 more sources

Research of harmonic distortion power for harmonic source detection

2016 17th International Conference on Harmonics and Quality of Power (ICHQP), 2016
The detection of harmonic source is important for harmonic responsibility sharing and mitigation. In this paper, a new indice for harmonic source detection is investigated. This indice is a power component decomposed from apparent power recommended by IEEE Std. 1459-2010, named harmonic distortion power. The theoretical effectiveness of this indice for
null Chang-Song Li, null Zhi-Xuan Bai, null Xian-Yong Xiao, null Ya-Mei Liu, null Yi Zhang   +4 more
openaire   +2 more sources

Effects of Loading Levels on Harmonic Distortion in Power Transformers Due to GIC Flows

Annual Meeting of the IEEE Industry Applications Society, 2023
Geomagnetically induced currents (GICs) are currents dominated by dc components that flow through grounding circuits into power systems. These currents are typically initiated by geomagnetic disturbances, and flow into power systems through power ...
S. Saleh, E. Zundel, J. Cardenas, E. F. .. Hill, J. Meng, G. Y. Morris, S. Brown   +6 more
semanticscholar   +1 more source

Impact of EV charging Station Penetration on Harmonic Distortion Level in Utility Distribution Network: A Case Study of Qatar

2021 IEEE Texas Power and Energy Conference (TPEC), 2021
The penetration of electric vehicles (EV) into the public distribution grid can create various technical issues related to the services' power quality and reliability.
A. Ahmed, A. Iqbal, I. Khan, A. Al-Wahedi, H. Mehrjerdi, S. Rahman   +5 more
semanticscholar   +1 more source

Analysis and Evaluating the Effect of Harmonic Distortion Levels in Industry

International Conference on Electrical and Control Engineering, 2021
Power Quality is an escalating concern for power engineers since the use of increased electronic devices. The primary reason for deteriorating Power Quality is high levels of Harmonics. Harmonic glitches in the industry are produced from numerous sources,
M. Riaz, Muhammad Muneeb Afzal, Sheikh Muhammad Aaqib, Haider Ali   +3 more
semanticscholar   +1 more source

Low and high order harmonic distortion in the presence of fast charging stations

, 2021
The aim of this paper is to assess the harmonic emission from fast charging stations at both the low-order and high-order harmonics. New three-phase effective power quantities are developed at both the low-order (harmonics below 40th order) and high ...
B. Basta, W. Morsi
semanticscholar   +1 more source

Harmonic Distortion Limits

2017
J. Das
openaire   +2 more sources

Generalized Three-Level Optimal Pulse Patterns With Lower Harmonic Distortion

IEEE transactions on power electronics, 2020
Optimized pulse patterns (OPPs) minimize the harmonic distortions of inductive loads. To simplify the analysis and computation, quarter- and half-wave symmetry is typically imposed.
Annika Birth, T. Geyer, H. Mouton, Martinus Dorfling   +3 more
semanticscholar   +1 more source

Temperature Dependence of Analog Performance, Linearity, and Harmonic Distortion for a Ge-Source Tunnel FET

IEEE Transactions on Electron Devices, 2020
In this article, we report an investigation of the effects of variation in temperature in the range of 300–450 K on the analog performance and harmonic distortion (HD) characteristics of a Ge-source tunnel FET (TFET) using a numerical device simulator ...
Emona Datta, A. Chattopadhyay, A. Mallik, Y. Omura   +3 more
semanticscholar   +1 more source

A Reduced Common-Mode-Voltage Pulsewidth Modulation Method With Output Harmonic Distortion Minimization for Three-Level Neutral-Point-Clamped Inverters

IEEE transactions on power electronics, 2020
This article presents a carrier-based pulsewidth modulation (PWM) strategy to reduce the common-mode voltage (CMV) with output harmonic distortion minimization for three-level neutral-point-clamped (NPC) inverters.
K. Pham, Nho-van Nguyen
semanticscholar   +1 more source