Results 131 to 140 of about 189,345 (270)
Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism
, 2022 Kari Hepola +2 more
openalex +1 more source
Enhancing digital workflows for removable partial dentures: A novel diagnostic surveyor and designer
Journal of Prosthodontics, Volume 35, Issue 1, Page 102-107, January 2026.Abstract Removable partial dentures (RPDs) are a valuable treatment option in prosthodontics, often selected due to patient‐specific limitations such as financial constraints, inadequate bone support, or medical contraindications to other prosthetic solutions.
Ahmed Mahrous +3 more
wiley +1 more source
Mechanism of CO2 and NH3 transport through human aquaporin 1: Evidence for parallel CO2 pathways
The Journal of Physiology, Volume 604, Issue 1, Page 336-365, 1 January 2026.Abstract figure legend The figure illustrates the permeation pathways for CO2, NH3 and H2O through AQP1. The panel on the left, with the wild‐type protein under control conditions, CO2 moves through monomeric pores (2 of 4 shown) but predominantly via an alternate pathway (perhaps the central pore of the tetramer).
Raif Musa‐Aziz +4 more
wiley +1 more source
Computing Performance Enhancement of VLIW Architecture Using Instruction Level Parallelism
, 2020 V. Venkata Nagendra Reddy +2 more
openalex +1 more source
Discrete Dynamics in Nature and Society, Volume 2026, Issue 1, 2026.Addressing the long‐standing issue that “existing indicators are outdated and misaligned with social demand” in evaluating talent cultivation quality through industry–education integration, this study develops an indicator system within the CIPP (Content, Input, Process, Product) framework. The system includes 4 primary and 11 secondary indicators.
Xiangyi Lin, Hongyun Luo, Deepali
wiley +1 more source
Register Pressure in Instruction Level Parallelism
, 2002 It has become a truism that memory accesses play the major role of degrading program performances. Optimizing compilers must avoid requesting data from memory, if possible, by using the available registers of underlying hardware in the best ways.This thesis reconsiders the register pressure concept so that it gets higher priority than instruction ...
openaire +1 more source
Instruction-level parallelism for low-power embedded processors
, 2000 Jean-Michel Puiatti
openalex +2 more sources
Domain-Specific Acceleration of Gravity Forward Modeling via Hardware-Software Co-Design. [PDF]
Micromachines (Basel)Yang Y, Sun D, Ma Z, Gu W.
europepmc +1 more source