Results 31 to 40 of about 224,259 (279)
Compiler-Directed Parallelism Scaling Framework for Performance Constrained Energy Optimization
IEEE Access, 2020 Evolution of semiconductor manufacturing technology leads to the rising trend of leakage current and the end of Dennard scaling. At the dark silicon era, aggressive power gating scheme with quantitative management on power-gated hardware resources is ...
Yung-Cheng Ma
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IET Communications, EarlyView., 2022 Abstract The goal of this work is to investigate how the self‐awareness characteristic of autonomic computing, paired with existing performance optimization rules, may be used in applications to minimise multi‐core processor performance concerns. The suggested self‐awareness technique can assist applications in self‐execution while also assisting other
Surendra Kumar Shukla +8 more
wiley +1 more source
Efficient resources assignment schemes for clustered multithreaded processors [PDF]
, 2008 New feature sizes provide larger number of transistors per chip that architects could use in order to further exploit instruction level parallelism. However, these technologies bring also new challenges that complicate conventional monolithic processor ...
Fernando, Latorre +2 more
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Exploring Various Levels of Parallelism in High-Performance CRC Algorithms
IEEE Access, 2019 Modern processors have increased the capabilities of instruction-level parallelism (ILP) and thread-level parallelism (TLP). These resources, however, typically exhibit poor utilization on conventional cyclic redundancy check (CRC) algorithms.
Mucong Chi, Dazhong He, Jun Liu
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Loop pipelining with resource and timing constraints [PDF]
, 1996 Developing efficient programs for many of the current parallel computers is not easy due to the architectural complexity of those machines. The wide variety of machine organizations often makes it more difficult to port an existing program than to ...
Sánchez Carracedo, Fermín
core +2 more sources
International Journal of Reconfigurable Computing, 2011 Limits of instruction-level parallelism and higher transistor density sustain the increasing need for multiprocessor systems: they are rapidly taking over both general-purpose and embedded processor domains.
Mateus B. Rutzig +7 more
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Late-Stage Optimization of Modern ILP Processor Cores via FPGA Simulation
Applied Sciences, 2022 Late-stage (post-RTL implementation) optimization is important in achieving target performance for realistic processor design. However, several challenges remain for modern out-of-order ILP (instruction-level-parallelism) processors, such as simulation ...
Mengqiao Lan +6 more
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The impact of exploiting instruction-level parallelism on shared-memory multiprocessors [PDF]
IEEE Trans. Computers, 1999 Vijay S. Pai +3 more
openalex +2 more sources
POWER: Parallel Optimizations With Executable Rewriting [PDF]
, 2011 The hardware industry's rapid development of multicore and many core hardware has outpaced the software industry's transition from sequential to parallel programs. Most applications are still sequential, and many cores on parallel machines remain unused.
Arora, Nipun +4 more
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IEEE Access, 2013 The adaptive Runge-Kutta (ARK) method on multi-general-purpose graphical processing units (GPUs) is used for solving large nonlinear systems of first-order ordinary differential equations (ODEs) with over ~ 10 000 variables describing a large genetic ...
Ahmad Al-Omari +3 more
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