Results 31 to 40 of about 220,437 (272)
LLVM RISC-V RV32X Graphics Extension Support and Characteristics Analysis of Graphics Programs
In recent years, virtual reality technology has become the dominant means of human-computer interaction, with computer graphics rendering technology being a crucial component in realizing virtual reality experiences.
Peng Wang, Zhi-Bin Yu
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A Highly-Efficient and Tightly-Connected Many-Core Overlay Architecture
The technology advances of CPU (Central Processing Unit) architecture alternate between generalization and specialization. In the past decade, the general performance has been enhanced while addressing the new brick walls that include power, memory, and ...
Riadh Ben Abdelhamid+2 more
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Abstract This research focuses on addressing the privacy issues in healthcare advancement monitoring with the rapid establishment of the decentralised communication system in the Internet of Medical Things (IoMT). An integrated blockchain homomorphic encryption standard with an in‐build supervised learning‐based smart contract is designed to improvise ...
Chandramohan Dhasarathan+7 more
wiley +1 more source
Abstract The goal of this work is to investigate how the self‐awareness characteristic of autonomic computing, paired with existing performance optimization rules, may be used in applications to minimise multi‐core processor performance concerns. The suggested self‐awareness technique can assist applications in self‐execution while also assisting other
Surendra Kumar Shukla+8 more
wiley +1 more source
Compiler-Directed Parallelism Scaling Framework for Performance Constrained Energy Optimization
Evolution of semiconductor manufacturing technology leads to the rising trend of leakage current and the end of Dennard scaling. At the dark silicon era, aggressive power gating scheme with quantitative management on power-gated hardware resources is ...
Yung-Cheng Ma
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Efficient resources assignment schemes for clustered multithreaded processors [PDF]
New feature sizes provide larger number of transistors per chip that architects could use in order to further exploit instruction level parallelism. However, these technologies bring also new challenges that complicate conventional monolithic processor ...
Fernando, Latorre+2 more
core +1 more source
Exploring Various Levels of Parallelism in High-Performance CRC Algorithms
Modern processors have increased the capabilities of instruction-level parallelism (ILP) and thread-level parallelism (TLP). These resources, however, typically exhibit poor utilization on conventional cyclic redundancy check (CRC) algorithms.
Mucong Chi, Dazhong He, Jun Liu
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Loop pipelining with resource and timing constraints [PDF]
Developing efficient programs for many of the current parallel computers is not easy due to the architectural complexity of those machines. The wide variety of machine organizations often makes it more difficult to port an existing program than to ...
Sánchez Carracedo, Fermín
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Limits of instruction-level parallelism and higher transistor density sustain the increasing need for multiprocessor systems: they are rapidly taking over both general-purpose and embedded processor domains.
Mateus B. Rutzig+7 more
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Late-Stage Optimization of Modern ILP Processor Cores via FPGA Simulation
Late-stage (post-RTL implementation) optimization is important in achieving target performance for realistic processor design. However, several challenges remain for modern out-of-order ILP (instruction-level-parallelism) processors, such as simulation ...
Mengqiao Lan+6 more
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