Results 41 to 50 of about 248 (147)
Cache WCET Analysis Method with Instruction Prefetching on Multi-cores
AN Likui,HAN Liyan
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PIPS: Prefetching Instructions with Probabilistic Scouts
A new instruction prefetching method is proposed, called prob-abilistic scouting, based on the concept of Control Flow Graph (CFG). Each node of the CFG is a distinct memory line, and a directed edge from node X to node Y means that line Y is a possible successor of line X. Each edge is annotated with the probability for the edge to be taken.
openaire +1 more source
Memory hierarchy characterization of SPEC CPU2006 and SPEC CPU2017 on the Intel Xeon Skylake-SP. [PDF]
Navarro-Torres A +3 more
europepmc +1 more source
Interpol review of digital evidence for 2019-2022. [PDF]
Reedy P.
europepmc +1 more source
BERT4Cache: a bidirectional encoder representations for data prefetching in cache. [PDF]
Shang J, Wu Z, Xiao Z, Zhang Y, Wang J.
europepmc +1 more source
Striped UniFrac: enabling microbiome analysis at unprecedented scale. [PDF]
McDonald D +7 more
europepmc +1 more source
SLOFetch: Compressed-Hierarchical Instruction Prefetching for Cloud Microservices [PDF]
Zhi-Fan Bao +5 more
openalex +1 more source
Movi: A fast and cache-efficient full-text pangenome index. [PDF]
Zakeri M +4 more
europepmc +1 more source
Sparse Convolution FPGA Accelerator Based on Multi-Bank Hash Selection. [PDF]
Xu J, Pu H, Wang D.
europepmc +1 more source

