Results 251 to 260 of about 9,050,905 (317)
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2004
In the performance model presented in Chapter 1, we identified two crucial factors to be b the bit width of the machine’s registers and w the width in bits of the numbers being used in the program. We examined the situation where w > b,taking the example of a 4-bit machine doing 16-bit arithmetic. In this case we saw that performance would vary as b/w.
Paul Cockshott, Kenneth Renfrew
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In the performance model presented in Chapter 1, we identified two crucial factors to be b the bit width of the machine’s registers and w the width in bits of the numbers being used in the program. We examined the situation where w > b,taking the example of a 4-bit machine doing 16-bit arithmetic. In this case we saw that performance would vary as b/w.
Paul Cockshott, Kenneth Renfrew
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1997
Extraction is a very common concept in ECAD, which is generally used as a means of validation, such as parameter extraction or netlist extraction from mask layout. In this chapter we present an extraction technique intended to provide the necessary link between hardware-oriented processor models and advanced code generation algorithms Instruction-set ...
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Extraction is a very common concept in ECAD, which is generally used as a means of validation, such as parameter extraction or netlist extraction from mask layout. In this chapter we present an extraction technique intended to provide the necessary link between hardware-oriented processor models and advanced code generation algorithms Instruction-set ...
openaire +1 more source
2003
It is natural to assume that since a processor must perform many kinds of operations, having only one instruction is inadequate. This leads to the question of instruction set completeness, or “what is the minimal functionality of an instruction needed to perform all other kinds of operations in a processor?” This simple question touches upon the area ...
William F. Gilreath, Phillip A. Laplante
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It is natural to assume that since a processor must perform many kinds of operations, having only one instruction is inadequate. This leads to the question of instruction set completeness, or “what is the minimal functionality of an instruction needed to perform all other kinds of operations in a processor?” This simple question touches upon the area ...
William F. Gilreath, Phillip A. Laplante
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Instructing Equational Set-Reasoning with Otter
2001An experimentation activity in automated set-reasoning is reported. The methodology adopted is based on an equational reengineering of ZF set theory within the ground formalism L× developed by Tarski and Givant. On top of a kernel axiomatization of map algebra we develop a layered formalization of basic set-theoretical concepts.
FORMISANO A +2 more
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Digital setting for instruction
Kybernetes, 2000Considers learning as the passage of information from one code to another; from the biological ones (DNA/PROTEIN/PATTERN) to the psychic (LANGUAGE). Believes that the circulation of information between the codes is a spontaneous phenomenon due to the informational presence of the environment: teaching must technically accelerate learning, acting on ...
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Evaluating the Impact of the Instruction Set on Microprocessor Reliability to Soft Errors
IEEE transactions on device and materials reliability, 2018Jorge A. Martínez +2 more
semanticscholar +1 more source
Cambricon: An Instruction Set Architecture for Neural Networks
International Symposium on Computer Architecture, 2016Shaoli Liu +7 more
semanticscholar +1 more source