Results 311 to 320 of about 8,185,322 (352)
Some of the next articles are maybe not open access.
Digital setting for instruction
Kybernetes, 2000Considers learning as the passage of information from one code to another; from the biological ones (DNA/PROTEIN/PATTERN) to the psychic (LANGUAGE). Believes that the circulation of information between the codes is a spontaneous phenomenon due to the informational presence of the environment: teaching must technically accelerate learning, acting on ...
openaire +2 more sources
Instruction set definition and instruction selection for ASIPs
Proceedings of 7th International Symposium on High-Level Synthesis, 2002Application Specific Instruction set Processors (ASIPs) are field or mask programmable processors of which the architecture and instruction set are optimised to a specific application domain. ASIPs offer a high degree of flexibility and are therefore increasingly being used in competitive markets like telecommunications.
Johan Van Praet +3 more
openaire +2 more sources
2012
In this chapter, we begin our study of microprocessors by studying instruction sets—the programmer's interface to the hardware. Although we hope to do as much programming as possible in high-level languages, the instruction set is the key to analyzing the performance of programs. By understanding the types of instructions that the CPU provides, we gain
openaire +3 more sources
In this chapter, we begin our study of microprocessors by studying instruction sets—the programmer's interface to the hardware. Although we hope to do as much programming as possible in high-level languages, the instruction set is the key to analyzing the performance of programs. By understanding the types of instructions that the CPU provides, we gain
openaire +3 more sources
2007
Publisher Summary This chapter provides some insight into the instruction set in the Cortex-M3 and examples for a number of instructions. It introduces some basic syntax of ARM assembly, use of suffixes & assembler language. The supported instruction lists are divided into 16-Bit (Data Processing, Branch, Load and Store & Other) instructions and 32 ...
openaire +3 more sources
Publisher Summary This chapter provides some insight into the instruction set in the Cortex-M3 and examples for a number of instructions. It introduces some basic syntax of ARM assembly, use of suffixes & assembler language. The supported instruction lists are divided into 16-Bit (Data Processing, Branch, Load and Store & Other) instructions and 32 ...
openaire +3 more sources
2003
To understand how OISC fits into the instruction set concept it is helpful to study the evolution of instruction sets. The emphasis on this synopsis is not comprehensive.6 Instead, the focus is on key moments in computing history that impacted the nature of instruction sets.
William F. Gilreath, Phillip A. Laplante
openaire +2 more sources
To understand how OISC fits into the instruction set concept it is helpful to study the evolution of instruction sets. The emphasis on this synopsis is not comprehensive.6 Instead, the focus is on key moments in computing history that impacted the nature of instruction sets.
William F. Gilreath, Phillip A. Laplante
openaire +2 more sources
1989
Publisher Summary This chapter discusses the instruction sets. The operations inside a microprocessor central processing unit (CPU) are governed by instructions read from the program memory. These normally consist of an opcode that defines the type of operation to be carried out and for many instructions there is also an operand that generally ...
openaire +2 more sources
Publisher Summary This chapter discusses the instruction sets. The operations inside a microprocessor central processing unit (CPU) are governed by instructions read from the program memory. These normally consist of an opcode that defines the type of operation to be carried out and for many instructions there is also an operand that generally ...
openaire +2 more sources
Reduced-Instruction-Set, Writable-Instruction-Set and Very-Long-Instruction-Word Computers [PDF]
, 1991 Instruction sets and their addressing modes and functional classes may grow to be quite complicated. For example, the widely used minicomputer VAX 11/780 has 16 addressing modes and more than 300 unique instructions! Even microprocessors often have complicated instruction sets. The Motorola 68020 recognizes seven data types, employs 18 addressing modes,
openaire +1 more source
Multilingual Instruction Tuning With Just a Pinch of Multilinguality
Annual Meeting of the Association for Computational LinguisticsAs instruction-tuned large language models (LLMs) gain global adoption, their ability to follow instructions in multiple languages becomes increasingly crucial.
Uri Shaham +5 more
semanticscholar +1 more source
2003
Publisher Summary This chapter describes the MSP430 instruction set. Quick reference tables categorize the instructions by operation type. The instructions are then individually described, with their effect on flags, and some common examples. The MSP430 instruction set consists of 27 base opcodes, some of which can be called as either byte or word ...
openaire +2 more sources
Publisher Summary This chapter describes the MSP430 instruction set. Quick reference tables categorize the instructions by operation type. The instructions are then individually described, with their effect on flags, and some common examples. The MSP430 instruction set consists of 27 base opcodes, some of which can be called as either byte or word ...
openaire +2 more sources
1987
Although the 68000 bears some family resemblance to the 6800, its designers took full advantage of the benefits of large-scale integration and 16-bit architecture to provide many more internal registers. This allows many variables to be held in the processor itself rather than in external storage, so avoiding some store read and write cycles and ...
openaire +2 more sources
Although the 68000 bears some family resemblance to the 6800, its designers took full advantage of the benefits of large-scale integration and 16-bit architecture to provide many more internal registers. This allows many variables to be held in the processor itself rather than in external storage, so avoiding some store read and write cycles and ...
openaire +2 more sources