Results 241 to 250 of about 280,892 (299)
Some of the next articles are maybe not open access.
Keyboard Layout Optimization and Adaptation
International Journal on Artificial Intelligence Tools, 2023Since the keyboard is the most common method for text input on computers today, the design of the keyboard layout is very significant. Despite the fact that the QWERTY keyboard layout was designed more than 100 years ago, it is still the predominant layout in use today.
Keren Nivasch, Amos Azaria
openaire +1 more source
Proceedings of the 2012 ACM symposium on Document engineering, 2012
Guillotine-based page layout is a method for document layout commonly used by newspapers and magazines, where each region of the page either contains a single article, or is recursively split either vertically or horizontally. Suprisingly there appears to be little research into algorithms for automatic guillotine-based document layout.
Graeme Gange +2 more
openaire +1 more source
Guillotine-based page layout is a method for document layout commonly used by newspapers and magazines, where each region of the page either contains a single article, or is recursively split either vertically or horizontally. Suprisingly there appears to be little research into algorithms for automatic guillotine-based document layout.
Graeme Gange +2 more
openaire +1 more source
An optimal layout of multigrid networks
Information Processing Letters, 1999zbMATH Open Web Interface contents unavailable due to conflicting licenses.
CALAMONERI, Tiziana, MASSINI, Annalisa
openaire +2 more sources
Optimal facility layout design
Operations Research Letters, 1998zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Russell D. Meller +2 more
openaire +1 more source
A Practical Approach to Layout Optimization
The Sixth International Conference on VLSI Design, 2005In this paper, we present a practical approach for finding optimal solutions for fixed-parameter versions of many VLSI layout problems. To illustrate, we develop efficient algorithms for gate matrix layout. Although gate matrix has become an increasingly popular layout style for CMOS circuits, the combinatorial problem at the heart of this style is NP ...
Rajeev Govindan +2 more
openaire +1 more source
An optimal layout of container yards
OR Spectrum, 2007zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Kap Hwan Kim, Young-Man Park, Mi-Ju Jin
openaire +2 more sources
Barge fleet layout optimization
International Journal of Computer Integrated Manufacturing, 2004This paper addresses the problem of layout optimization for barge fleet operations. In this context, layout refers to the positioning and allocation of river-based tow building sites for tow building, breaking, and cleaning operations in support of commodity shipments via barge transport.
Gail W. DePuy +2 more
openaire +1 more source
On designing optimal camouflaged layouts
2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2017Integrated circuit (IC) camouflaging is a layout-level technique that hampers reverse-engineering attacks. In one embodiment of camouflaging, layouts of different Boolean gates are designed to look alike by using a combination of true and dummy contacts. The security of IC camouflaging using dummy contacts depends on an attackers inability to determine
Thomas Broadfoot +2 more
openaire +1 more source
IEEE Transactions on Computers, 1988
A design method using both logical optimization and optimized topological arrangements is described. Starting from a minimized Boolean function, a synthesis of an optimized well-structured network is obtained. The most original aspect of this approach is a transistor merging procedure leading to a nonseries-parallel network while maintaining a ...
Ghislaine Thuau, Gabriele Saucier
openaire +1 more source
A design method using both logical optimization and optimized topological arrangements is described. Starting from a minimized Boolean function, a synthesis of an optimized well-structured network is obtained. The most original aspect of this approach is a transistor merging procedure leading to a nonseries-parallel network while maintaining a ...
Ghislaine Thuau, Gabriele Saucier
openaire +1 more source

