Results 171 to 180 of about 7,549 (186)
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High-speed generation of LFSR signatures
Proceedings of the Ninth Asian Test Symposium, 2002We investigate techniques for speeding up the compaction simulation of a single-input signature register based on its equivalent multiple-input implementation. Our approach is to systematically decompose the original input sequence into a set of subsequences based on the theory of finite field.
null Ming-Der Shieh +2 more
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Word Oriented Cascade Jump σ−LFSR
2009Bit oriented cascade jump registers were recently proposed as building blocks for stream cipher. They are hardware oriented designed hence inefficient in software. In this paper word oriented cascade jump registers are presented based on the design idea of bit oriented cascade jump registers.
Guang Zeng +3 more
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Non-linear Combinations of LFSRs
2013As we have seen in the previous chapter a secure cipher need at least one nonlinear part. The natural way to proceed is to study nonlinear combinations of LFSRs. In this chapter we will meet for the first time the three big attack classes (correlation attacks, algebraic attacks, time-memory trade-off attacks).
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Efficient LFSR Reseeding Technique
This research introduces a novel approach to optimize LFSR reseeding in logic BIST by utilizing a new test pattern generator with the Seed Initialization Method (SIM). Unlike traditional methods which require additional memory for storing seeds this approach eliminates the need for such storage.openaire +1 more source
A Secure Steganography Scheme Using LFSR
2019Steganography is a technique to hide the secret data inside some other cover files (like text, image, audio, etc.) in such a way that it prevents the detection of the secret data within the cover files. In this paper, a new scheme of concealing secret data has been introduced where the locations of hiding the secret bits will be generated by linear ...
Debalina Ghosh +3 more
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LFSR-Based Generation of Multicycle Tests
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016This paper describes a procedure for computing a multicycle test set whose scan-in states are compressed into seeds for a linear-feedback shift register, and whose primary input vectors are held constant during the application of a multicycle test.
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RECO-LFSR: Reconfigurable Low-power Cryptographic processor based on LFSR for Trusted IoT platforms
2023 24th International Symposium on Quality Electronic Design (ISQED), 2023Mohamed El-Hadedy +4 more
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Efficient Partially Blind Signature from LFSR
Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing (SNPD 2007), 2007Zheng Gong, Yu Long, Kefei Chen
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