Results 51 to 60 of about 7,549 (186)

Securing Generative Artificial Intelligence with Parallel Magnetic Tunnel Junction True Randomness

open access: yesAdvanced Intelligent Systems, Volume 8, Issue 2, February 2026.
True random numbers can protect generative artificial intelligence (GAI) models from attacks. A highly parallel, spin‐transfer torque magnetic tunnel junction‐based system is demonstrated that generates high‐quality, energy‐efficient random numbers.
Youwei Bao, Shuhan Yang, Hyunsoo Yang
wiley   +1 more source

A P-N Sequence Generator Using LFSR with Dual Edge Trigger Technique

open access: yesMATEC Web of Conferences, 2016
This paper represents the design and implementation of a low power 4-bit LFSR using Dual edge triggered flip flop. A linear feedback shift register (LFSR) is assembled by N number of flip flops connected in series and a combinational logic generally xor ...
Naghwal Nitin Kumar, Kumar Abhishek
doaj   +1 more source

Algebraic Attack on the Alternating Step(r,s)Generator [PDF]

open access: yes, 2010
The Alternating Step(r,s) Generator, ASG(r,s), is a clock-controlled sequence generator which is recently proposed by A. Kanso. It consists of three registers of length l, m and n bits. The first register controls the clocking of the two others.
Hassanzadeh, Mehdi M., Helleseth, Tor
core  

The Cycle Structure of LFSR with Arbitrary Characteristic Polynomial over Finite Fields

open access: yes, 2016
We determine the cycle structure of linear feedback shift register with arbitrary monic characteristic polynomial over any finite field. For each cycle, a method to find a state and a new way to represent the state are proposed.Comment: An extended ...
Chang, Zuling   +3 more
core   +1 more source

New Difference Triangle Sets by a Field‐Programmable Gate Array‐Based Search Technique

open access: yesJournal of Combinatorial Designs, Volume 34, Issue 1, Page 37-50, January 2026.
ABSTRACT We provide some difference triangle sets with scopes that improve upon the best known values. These are found with purpose‐built digital circuits realized with field‐programmable gate arrays (FPGAs) rather than software algorithms running on general‐purpose processors.
Mohannad Shehadeh   +2 more
wiley   +1 more source

Attacking the combination generator [PDF]

open access: yes, 2009
We present one of the most efficient attacks against the combination generator. This attack is inherent to this system as its only assumption is that the filtering function has a good autocorrelation. This is usually the case if the system is designed to
Didier, Frédéric, Laigle-Chapuy, Yann
core   +3 more sources

The Pagoda Sequence: a Ramble through Linear Complexity, Number Walls, D0L Sequences, Finite State Automata, and Aperiodic Tilings

open access: yes, 2009
We review the concept of the number wall as an alternative to the traditional linear complexity profile (LCP), and sketch the relationship to other topics such as linear feedback shift-register (LFSR) and context-free Lindenmayer (D0L) sequences.
Anthony K. Seda   +4 more
core   +2 more sources

FPGA Realization of a Novel Hyperchaos Augmented Image Encryption Algorithm

open access: yesIET Computers &Digital Techniques, Volume 2026, Issue 1, 2026.
With the rapid growth of multimedia communication, protecting image data has become increasingly critical. This article proposes a novel 3‐stage hyperchaos‐based augmented image encryption technique (3SHAIET) that utilizes a three‐stage process with chaotic systems of increasing dimensionality (e.g., six‐dimensional [6D], 8D, and 9D) to enhance ...
Wassim Alexan   +6 more
wiley   +1 more source

A Novel Image Steganographic Method Based on Enhanced PIWT and Modified Optimal Pixel Adjustment Process

open access: yesIET Image Processing, Volume 20, Issue 1, January/December 2026.
This paper proposes a novel image steganographic method based on an enhanced Pyramid Integer Wavelet Transform (PIWT) combined with a Modified Optimal Pixel Adjustment Process (MOPAP). The PIWT enables integer‐to‐integer transformation, avoiding floating‐point computations and improving its suitability for efficient implementation.
Ali Yahya Al‐Ashwal   +2 more
wiley   +1 more source

Design a Third‐Order DDSM With Effective Random Dither in Fractional Frequency Synthesizers to Reduce Fractional Spurs

open access: yesJournal of Electrical and Computer Engineering, Volume 2026, Issue 1, 2026.
In this paper, a new method for multistage digital sigma–delta modulators (DDSMs) is presented to increase the output sequence period and reduce fractional spurs. The output of a DDSM is always a periodic signal when the input is constant. A hybrid DDSM is premiere to its conventional counterpart for having a potential speed, by the choice of its ...
Seyed Ali Sadatnoori   +2 more
wiley   +1 more source

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