Using SAT Solvers to Finding Short Cycles in Cryptographic Algorithms [PDF]
A desirable property of iterated cryptographic algorithms, such as stream ciphers or pseudo-random generators, is the lack of short cycles. Many of the previously mentioned algorithms are based on the use of linear feedback shift registers (LFSR) and ...
Władysław Dudzic, Krzysztof Kanciak
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The Pagoda Sequence: a Ramble through Linear Complexity, Number Walls, D0L Sequences, Finite State Automata, and Aperiodic Tilings [PDF]
We review the concept of the number wall as an alternative to the traditional linear complexity profile (LCP), and sketch the relationship to other topics such as linear feedback shift-register (LFSR) and context-free Lindenmayer (D0L) sequences.
Fred Lunnon
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SCALABLE LOGIC BIST DESIGN AND ANALYSIS FOR ENHANCED TESTING OF COMBINATIONAL CIRCUITS [PDF]
The paper introduces a scalable Logic Built-In Self-Test (BIST) approach for combinational circuits, utilizing a Bit Swapping Linear Feedback Shift Register (BS-LFSR) as the test pattern generator.
Suhas Shirol +3 more
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A Mixture between Rule 90 and Rule 150 Cellular Automata as a Test Pattern Generator [PDF]
Built-in Self-test (BIST) is one of integrated circuit (IC) testing techniques that can be used as a pseudo-random generator for the Circuit Under Test (CUT). This paper introduces the design and simulation of a 4-bit test pattern generator (TPG) using a
Sahar Alawey
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Secure Image Encryption Based on Compressed Sensing and Scrambling for Internet-of-Multimedia Things
In this paper, we propose a secure image encryption system based on compressed sensing (CS) with a scrambling mechanism. For efficient encryption, we use a sparse measurement matrix, where the nonzero elements are generated by a linear feedback shift ...
Jaephil Choi, Nam Yul Yu
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Design and Test of the In-Array Build-In Self-Test Scheme for the Embedded RRAM Array
An in-array build-in self-test (BIST) scheme is proposed for the embedded resistive random access memory (RRAM) array. The BIST circuit consists of the linear-feedback-shift-register (LFSR)- based pattern generator and the multi-input signature register (
Xiaole Cui +4 more
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Scrambling and De-Scrambling Implementation Using Linear Feedback Shift Register Method on FPGA
Digital broadband communications require a fast, functional and efficient system. In a digital communication system, a long sequence of bits '0' or '1' will inherits the loss of bit synchronization, and hence it can cause the false detection on the ...
Manda Lurina +2 more
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A Novel Nonlinear Pseudorandom Sequence Generator for the Fractal Function
A pseudorandom sequence is a repeatable sequence with random statistical properties that is widely used in communication encryption, authentication and channel coding.
Yelai Feng +5 more
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An internet-based IP protection scheme for circuit designs using linear feedback shift register (LFSR)-based locking [PDF]
IP reuse is rapidly proliferating recent automated circuit design. It is facing serious challenges like forgery, theft and misappropriation of intellectual property (IP) of the design. Thus, protection of design IP is a matter of prime concern. In this paper, we propose a novel Internet-based scheme to tackle this problem.
Raju Halder +3 more
openaire +1 more source
A Pseudorandom Binary Generator Based on Chaotic Linear Feedback Shift Register [PDF]
This paper presents a simple method for the design of Chaotic Linear Feedback Shift Register (CLFSR) system. The proposed method is based on a combination of two known systems.
Saad Muhi Falih
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