Results 11 to 20 of about 788 (196)

Scrambling and De-Scrambling Implementation Using Linear Feedback Shift Register Method on FPGA

IJAIT (International Journal of Applied Information Technology), 2017
Digital broadband communications require a fast, functional and efficient system. In a digital communication system, a long sequence of bits '0' or '1' will inherits the loss of bit synchronization, and hence it can cause the false detection on the ...
Manda Lurina, Sugondo Hadiyoso, Rina Pudji Astuti   +2 more
doaj   +2 more sources

An internet-based IP protection scheme for circuit designs using linear feedback shift register (LFSR)-based locking [PDF]

Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes, 2009
IP reuse is rapidly proliferating recent automated circuit design. It is facing serious challenges like forgery, theft and misappropriation of intellectual property (IP) of the design. Thus, protection of design IP is a matter of prime concern. In this paper, we propose a novel Internet-based scheme to tackle this problem.
Raju Halder, Parthasarathi Dasgupta, Saptarshi Naskar, Samar Sen-Sarma   +3 more
openaire   +2 more sources

Speech Encryption And Decryption Using Linear Feedback Shift Register (Lfsr)

, 2008
{"references": ["Dao Q. Van, Anne Weiz and Benot Geller, Improving End to End\nLatency for Voice over IPSec Streams.", "D. Minoli and E. Minoli, Delivering Voice over IP Networks, New\nYork: John Wiley & Sons, 1998.", "D. Richard Kuhn, Thomas J. Walsh, Steffen Fries,\nSecurity Considerations for voice Over IP Systems.", "P. Alfke, \"Efficient Shift
Tin Lai Win, Nant Christina Kyaw
openaire   +2 more sources

Optimized Pseudo Random Bit Generator in QCA Technology

Engineering Reports
Quantum Dot Cellular Automata (QCA) technology is one of the new technologies in the field of digital electronics. In this article, for the first time, some unique designs are presented in the most optimal possible state in the QCA technology.
Pezhman Kiani Vosta, Mohammad Gholami, Amard Afzalian   +2 more
doaj   +2 more sources

Using SAT Solvers to Finding Short Cycles in Cryptographic Algorithms [PDF]

International Journal of Electronics and Telecommunications, 2020
A desirable property of iterated cryptographic algorithms, such as stream ciphers or pseudo-random generators, is the lack of short cycles. Many of the previously mentioned algorithms are based on the use of linear feedback shift registers (LFSR) and ...
Władysław Dudzic, Krzysztof Kanciak
doaj   +1 more source

Reconfigurable linear feedback shift register for wireless communication and coding [PDF]

, 2023
Linear feedback shift register (LFSR) is the basic building block of the communication system used in different coding, error detection and correction codes, such as gold, low-density parity check (LDPC), polar, and turbo codes.
Kumar, Adesh, Adesh Kumar, Aakanksha Devrari, Devrari, Aakanksha   +3 more
core   +1 more source

Using classifiers to predict linear feedback shift registers [PDF]

, 2001
Proceeding of: IEEE 35th International Carnahan Conference on Security Technology. October 16-19, 2001, LondonPreviously (J.C. Hernandez et al., 2000), some new ideas that justify the use of artificial intelligence techniques in cryptanalysis are ...
Mex-Perera, C., Sierra, José M., Hernández, Julio C., Isasi, Pedro, Ramos Álvarez, Benjamín, Isasi Viñuela, Pedro   +5 more
core   +1 more source

SCALABLE LOGIC BIST DESIGN AND ANALYSIS FOR ENHANCED TESTING OF COMBINATIONAL CIRCUITS [PDF]

Proceedings on Engineering Sciences
The paper introduces a scalable Logic Built-In Self-Test (BIST) approach for combinational circuits, utilizing a Bit Swapping Linear Feedback Shift Register (BS-LFSR) as the test pattern generator.
Suhas Shirol , Rajashekhar Shettar , Ramakrishna S , Vijay H M   +3 more
doaj   +1 more source

Design and Test of the In-Array Build-In Self-Test Scheme for the Embedded RRAM Array

IEEE Journal of the Electron Devices Society, 2019
An in-array build-in self-test (BIST) scheme is proposed for the embedded resistive random access memory (RRAM) array. The BIST circuit consists of the linear-feedback-shift-register (LFSR)- based pattern generator and the multi-input signature register (
Xiaole Cui, Miaomiao Zhang, Qiujun Lin, Xiaoxin Cui, Anqi Pang   +4 more
doaj   +1 more source

A Mixture between Rule 90 and Rule 150 Cellular Automata as a Test Pattern Generator [PDF]

Engineering and Technology Journal, 2018
Built-in Self-test (BIST) is one of integrated circuit (IC) testing techniques that can be used as a pseudo-random generator for the Circuit Under Test (CUT). This paper introduces the design and simulation of a 4-bit test pattern generator (TPG) using a
Sahar Alawey
doaj   +1 more source