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Low-Power Testing for Low-Power Devices

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
Low-power devices are indispensable for modern electronic applications, and numerous hardware/software techniques have been developed for drastically reducing functional power dissipation. However, the testing of such low-power devices has increasingly become a serious problem, especially in at-speed scan testing where a transition is launched at the ...
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Low-power electronics

IEEE Design & Test of Computers, 1994
Plans for a government sponsored research program call for the development of a new electronics technology base for hand-size information systems. This base will enable the design and implementation of semiconductor technologies that consume two orders of magnitude less power than conventional technology would have allowed.
Zachary J. Lemnios, Kaigham J. Gabriel
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A Low-Power View

JAMA: The Journal of the American Medical Association, 1970
In an article entitled "The World Through Myopic Eyes," Trevor-Roper' endeavors to show how certain poets, writers, and painters were influenced by the shortness of their sight. Lord Byron might well have agreed. It was he who observed that Lord Russell's essays on London society were too microscopic for his mind, and advised, "He who would take a just
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Radiation effects in low power and ultra low power voltage references

2016 17th Latin-American Test Symposium (LATS), 2016
This work investigates the effects of ionizing radiation in low power and ultra-low power voltage references. Two specific circuits were selected as case studies, both designed in IBM 130nm technology. By means of SPICE simulation, the electrical equivalent effects of Total Ionizing Dose (TID) were simulated, corresponding to a total dose of 500krad. A
Daniel Fusco, Tiago R. Balen
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Low-power wireless bus

Proceedings of the 10th ACM Conference on Embedded Network Sensor Systems, 2012
We present the Low-Power Wireless Bus (LWB), a communication protocol that supports several traffic patterns and mobile nodes immersed in static infrastructures. LWB turns a multi-hop low-power wireless network into an infrastructure similar to a shared bus, where all nodes are potential receivers of all data.
F. Ferrari   +3 more
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Low power SOAs

2017 19th International Conference on Transparent Optical Networks (ICTON), 2017
We will discuss some strategies for reduced power consumption of semiconductor optical amplifiers. This is important for commercial applications where the SOA needs to be incorporated into a compact low-power module such as for datacenter communications.
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Low power mode and IEEE 1149.1 compliance: a low power solution

Proceedings., International Test Conference, 2002
The requirements of a low power mode, built into complex VLSI IC's such as microprocessors, seem to conflict with the IEEE 1149.1 Standard (JTAG). The perception that the TAP Pins-T~R~S~T~, TMS, and TDI-must be equipped with power-consuming pullup resistors or that low power and 1149.1 modes of operation are mutually exclusive is erroneous.
Alfred L. Crouch   +2 more
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A low power asynchronous DES

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196), 2002
Nowadays, there are many Cryptographic Applications that demand both high speed and low power. In order to meet this requirement, we have designed a new asynchronous Data Encryption Standard (DES) data encryption chip and decided that can be used in contactless smart cards.
Pui-Lam Siu   +3 more
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Low power and QoS

IEEE Concurrency, 1999
Quality of service has recently emerged as one of the most important research topics and engineering problems in a number of fields, including the Internet, multimedia, and wireless communication. However, the interest in QoS in these fields has not been matched by similar interest among system designers.
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On low power test and low power compression techniques

2018
<p>With the ever increasing integration capability of semiconductor technology, today's large integrated circuits require an increasing amount of data to test them which increases test time and elevated requirements of tester memory.</p> <p>At the same time, as VLSI design sizes and their operating frequencies continue
Elham Khayat Moghaddam   +6 more
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