The use of output-capacitorless class-AB CMOS low-dropout regulator for power management [PDF]
Peer ReviewedPostprint (published ...
Martínez García, Herminio
core +1 more source
Design and modelling of positive LDO voltage regulator [PDF]
In present study the total ionizing dose effects in a positive low-dropout linear voltage regulator IS-LS1-3.3V was investigated experimentally using the developed the X-ray research complex.
Rybalka Sergey +2 more
doaj +1 more source
An Area Efficient Low Dropout Voltage Regulator With Improved Transient Response for Hearing-aid Applications [PDF]
This paper presents a low dropout voltage regulator, with the specifications suitable for hearing aid devices. The proposed LDO occupies very less area on chip and provides an excellent transient response.
Ananthakrishna T +2 more
doaj
An RFID-Based Self-Biased 40 nm Low Power LDO Regulator for IoT Applications
There are emerging applications, like bridge structural health monitoring, continuous patient condition and outdoor aiding of the elderly and the disabled, where Internet of things (IoT) nodes are used with very limited accessibility and no connection to
Asghar Bahramali, Marisa Lopez-Vallejo
doaj +1 more source
CAPACITOR-LESS LOW-DROPOUT VOLTAGE REGULATOR
A 1.2-V 40-mA capacitor-free CMOS low-dropout regulator (LDO) for system-on-chip applications to reduce board space and external pins is presented. By utilizing damping-factor control frequency compensation on the advanced LDO structure, the proposed LDO provides high stability, as well as fast line and load transient responses, even in capacitorfree ...
SRIRANGANATHA SAGAR.K.N +2 more
openaire +1 more source
Quasi-digital low-dropout voltage regulators uses controlled pass transistors [PDF]
This article presents a low quiescent current output capacitorless quasi-digital CMOS LDO regulator with controlled pass transistors according to load demands.
Alarcón Cot, Eduardo José +2 more
core +3 more sources
A Low-Dropout Voltage Regulator with a Fractional-Order Control [PDF]
This paper presents a 5 V / 50 mA low-dropout voltage regulator (LDO). The LDO uses a fractional-order control for its regulation loop to achieve a high DC gain (for a tight DC regulation) while avoiding (for a good stability) a high gain at high ...
L. Kadlcik, P. Horsky
doaj
Current Context and Research Trends in Linear DC–DC Converters
With the introduction of switch-mode power supplies (SMPS) in the mid-1970s, the efficiency of DC–DC conversion rose from 60 to 80% and SMPS became a popular power supply solution. However, linear regulators have not become obsolete.
Kosala Gunawardane +4 more
doaj +1 more source
Embedded 5V-to-3.3V Voltage Regulator for Supplying Digital ICs in 3.3V CMOS Technology [PDF]
A fully integrated 5 V-to-3.3 V supply voltage regulator for application in digital IC's has been designed in a 3.3 V 0.5 μm CMOS process. The regulator is able to deliver peak current transients of 300 mA, while the output voltage remains within a ...
Besten, Gerrit W. den, Nauta, Bram
core +2 more sources
Design of a Low-Noise Low Dropout Regulator for CMOS Pixel Sensors
A low-noise Low Dropout Regulator (LDO) is designed in a Semiconductor Manufacturing International Corporation (SMIC) $0.18~\mu $ m process, aiming at supply of a clean and constant clamping voltage in the operation of Correlated Double Sampling (CDS ...
Shi Zhan +4 more
doaj +1 more source

