Results 261 to 270 of about 7,752,729 (310)

PartitionSim: A Parallel Simulator for Many-cores

2012 IEEE 14th International Conference on High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems, 2012
This paper introduces PartitionSim, a parallel simulator for future thousand-core processors. The purpose of PartitionSim is to improve the simulation performance of many-core architectures at the expense of little accuracy sacrifice. To achieve this goal, we propose a novel technique: timing partition. Timing partition is based on such an observation:
Shuai Jiao, Da Wang, Xiaochun Ye, Weizhi Xu 0001, Hao Zhang 0009, Ninghui Sun   +5 more
openaire   +1 more source

3D NOC for many-core processors

Microelectronics Journal, 2011
With an increasing number of processors forming many-core chip multiprocessors (CMP), there exists a need for easily scalable, high-performance and low-power intra-chip communication infrastructure for emerging systems. In CMPs with hundreds of processing elements, 3D integration can be utilized to shorten long wires forming communication links.
Aamir Zia, Sachhidh Kannan, H. Jonathan Chao, Garrett S. Rose   +3 more
openaire   +1 more source

FAST detector on many-core computers

2012 IEEE Second International Conference on Consumer Electronics - Berlin (ICCE-Berlin), 2012
Many-core architectures are becoming increasingly popular due to advances in open programming environments. Typical architectures are Graphics Processing Units (GPUs) and Homogenous Computing Fabrics, offering high computing parallelism in order to decrease execution time of computationally intensive algorithms, for example in Computer Vision.
Bruno Jego, Mathieu Robart, Kaushik Saha, Danilo Pietro Pau   +3 more
openaire   +1 more source

Pulsar Searching with Many-Cores

2013
Pulsars are rapidly rotating neutron stars whose signal is received on Earth periodically. They are relatively newly discovered astronomical objects (the first was discovered only in 1967) and elusive ones: so far only two thousand of them are know.
Sclocco, A., van Nieuwpoort, R.V.
openaire   +1 more source

Parallel many-core avionics systems

Proceedings of the 14th International Conference on Embedded Software, 2014
Integrated Modular Avionics (IMA) enables incremental qualification by encapsulating avionics applications into software partitions (SWPs), as defined by the ARINC 653 standard. SWPs, when running on top of single-core processors, provide robust time partitioning as a means to isolate SWPs timing behavior from each other.
Milos Panic, Eduardo Quiñones, Pavel G. Zaykov, Carles Hernández 0001, Jaume Abella 0001, Francisco J. Cazorla   +5 more
openaire   +1 more source

Secure Admission of Applications in Many-cores

2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2018
The adoption of many-cores systems makes the concern for data protection a critical design requirement. A secure application that processes sensitive data may have its security harmed by a malicious process. The literature contains several proposals to protect many-cores against attacks, focusing for example in the protection of the application ...
Luciano L. Caimi, Vinicius Fochi, Fernando Gehm Moraes   +2 more
openaire   +1 more source

Many-Core Programming

2013
Many-core architecture currently plays an important role in offering intensive computational power. Efficient programming based on a many-core architecture is the enabling technology to implement the EMMS paradigm. This chapter is a preliminary introduction to many-core programming taking GPU as an example.
Jinghai Li, Wei Ge, Wei Wang, Ning Yang, Xinhua Liu, Limin Wang, Xianfeng He, Xiaowei Wang, Junwu Wang, Mooson Kwauk   +9 more
openaire   +1 more source

Towards a many-core architecture for HPC

2013 23rd International Conference on Field programmable Logic and Applications, 2013
Many-core architectures are a current avenue of research, seeking alternative higher efficiency computing, and HPC is one domain which may benefit most from such a model. While at an initial prototyping stage we present here the design of a MIMD many-core processor, Fynbos and, considering the problems of programmability, an autoparallelising Fortran ...
Janet Wyngaard, Michael Inggs, John Collins, Brian Farrimond   +3 more
openaire   +1 more source

Resiliency for many-core system on a chip

2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 2014
Resilient techniques are commonly employed for dynamic and static variation tolerance. In this paper, we present an adaptive clocking technique that achieves 31% throughput increase with 15% energy reduction, and an adaptive interconnect fabric technique that increases bandwidth by 63% with 14.6% energy reduction.
Tanay Karnik, James W. Tschanz, Nitin Borkar, Jason Howard, Sriram R. Vangal, Vivek De, Shekhar Borkar   +6 more
openaire   +1 more source

The BubbleWrap many-core

Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, 2009
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly increasing with technology scaling. In future designs, many of the cores may have to be dormant at any given time to meet the power budget. To push back the many-core power wall,
Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas   +2 more
openaire   +1 more source