Results 151 to 160 of about 11,144 (308)

Biasing of memristor (inset—Memristor symbol).

open access: yes
In recent years, non-volatile memory elements have become highly appealing for memory applications to implement a new class of storage memory that could replace flash memories in sequential logic applications, with features such as compactness, low power,
Rajeev Pankaj Nelapati (18121292)   +1 more
core   +1 more source

A Dual‐Memory Ferroelectric Transistor Emulating Synaptic Metaplasticity for High‐Speed Reservoir Computing

open access: yesAdvanced Electronic Materials, EarlyView.
A CMOS‐compatible ferroelectric transistor harnesses the interplay between stable gate polarization memory and volatile non‐quasi‐static channel charge dynamics to emulate how biological synapses regulate their own plasticity. This brain‐inspired dual‐memory mechanism, realized in a single device, enables a physical reservoir computer that solves ...
Yifan Wang   +8 more
wiley   +1 more source

SPICE‐Compatible Compact Modeling of Cuprate‐Based Memristors Across a Wide Temperature Range

open access: yesAdvanced Electronic Materials, EarlyView.
A physics‐guided compact model for YBCO memristors is introduced, incorporating carrier trapping, field‐induced detrapping, and a differential balance equation to describe their switching dynamics. The model is compared with experiments and implemented in LTspice, allowing realistic circuit‐level simulations.
Thomas Günkel   +6 more
wiley   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

open access: yesAdvanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez   +10 more
wiley   +1 more source

On the Role of Preprocessing and Memristor Dynamics in Reservoir Computing for Image Classification

open access: yesAdvanced Electronic Materials, EarlyView.
ABSTRACT Reservoir computing (RC) is an emerging recurrent neural network architecture that has attracted growing attention for its low training cost and modest hardware requirements. Memristor‐based circuits are particularly promising for RC, as their intrinsic dynamics can reduce network size and parameter overhead in tasks such as time‐series ...
Rishona Daniels   +4 more
wiley   +1 more source

Experimental Demonstration of Temporally Aware Fault‐Tolerant Sensor Fusion Using Memristive Associative Learning

open access: yesAdvanced Electronic Materials, EarlyView.
In dynamic driving scenarios, the proposed approach ensures only temporally aligned sensor inputs to make driving decisions, preventing false activations. By enabling selective hardware‐level learning, it achieves fast, reliable responses under noisy conditions.
Kapil Bhardwaj   +4 more
wiley   +1 more source

Ferroelectric Behavior of Micro‐ to Submicron‐Scale HZO Capacitors: Impact of the Perimeter‐to‐Area Ratio

open access: yesAdvanced Electronic Materials, EarlyView.
Using C‐AFM, W/HZO/p‐Ge capacitors with areas down to 0.26 µm2 are investigated. Frequency‐dependent voltage ramps reveal switching currents that confirm complete polarization reversal across the entire electrode area, while PUND enables reconstruction of P–V loops.
Lucian Trupina   +10 more
wiley   +1 more source

Dynamical Symbiosis of Solar Cell and Memristor. [PDF]

open access: yesACS Energy Lett
Kumar J   +3 more
europepmc   +1 more source

The Influence of Residual Ion Drift During Programming of Chip‐Integrated Nanoscale HfO2‐Based Memristive Devices

open access: yesAdvanced Electronic Materials, EarlyView.
1T1R‐arrays combining filamentary‐type memristors and CMOS transistors offer great potential for energy‐efficient analog hardware accelerators. Here, transient SET analysis of nanoscale HfO2 memristors integrated on 180 nm CMOS wafers is discussed.
Oliver Artner   +11 more
wiley   +1 more source

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