Results 161 to 170 of about 32,825 (324)
Spiking Neuron with Sensing Coil Based on a Volatile Memristor. [PDF]
Karimov T +5 more
europepmc +1 more source
Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology
Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh +3 more
wiley +1 more source
Engineering halogen-doped carbon dots for enhanced bioinspired synapses toward neuromorphic computing and neural interfaces. [PDF]
Hao H +10 more
europepmc +1 more source
The systematic design of memristor‐based neural network is provided by analog conductance state parameters to accurately emulate the software‐based high‐resolution weight at discrete device level. The requirement of discrete analog conductance of memristor device is measured as ≈50 states with nonlinearity value of ≈0.142 within the deviation range of ...
Jingon Jang, Yoonseok Song, Sungjun Park
wiley +1 more source
A hardware-adaptive learning algorithm for superlinear-capacity associative memory on memristor crossbars. [PDF]
He C +8 more
europepmc +1 more source
The approach of physical in materia computing incorporates parallel computing within the medium itself. A scalable and energy‐efficient, oxide‐based computational platform is realized in form of a nanoporous network of volatile niobium oxide memristors sandwiched between top and bottom metallic electrodes, and then tested for prediction and ...
Joshua Donald +7 more
wiley +1 more source
Privacy-preserving data analysis using a memristor chip with colocated authentication and processing. [PDF]
Liu Z +7 more
europepmc +1 more source
Hardware‐Based On‐Chip Learning Using a Ferroelectric AND‐Type Array With Random Synaptic Weights
This work demonstrates an energy‐efficient on‐chip learning system using an Metal‐Ferroelectric‐Insulator‐Semiconductor FeAND synaptic array. By employing a feedback alignment scheme with a separate backward array using fixed random weights, the system overcomes directional limitations of AND‐type arrays and achieves robust, low‐power learning suitable
Minsuk Song +8 more
wiley +1 more source
An Analogue Memristor Based on Conjugated Porous Polymer Composite for Artificial Synapse. [PDF]
Hao H +12 more
europepmc +1 more source

