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Chip-Based Electronic System for Quantum Key Distribution. [PDF]
Entropy (Basel)Zhang S, Mao W, Luo S, Sun S.
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A Low-Voltage Low-Power Voltage-to-Current Converter with Low Temperature Coefficient Design Awareness. [PDF]
Sensors (Basel)Chen H, Chan PK.
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Dynamical control of nanoscale electron density in atomically thin n-type semiconductors via nano-electric pulse generator. [PDF]
Sci AdvKim S +9 more
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A novel topology in RNMC amplifiers with single miller compensation capacitor
2008 IEEE International Symposium on Circuits and Systems, 2008This paper presents a reversed single active Miller compensation (RSAMC) technique for low-voltage and large capacitive load three-stage amplifiers. In this scheme, only one active compensation capacitor is employed. The main advantages of the proposed compensation method are the enhanced unity gain bandwidth and reduced silicon die area of the ...
Farshid Raissi, Mohammad Yavari
exaly +3 more sources
Single Miller capacitor frequency compensation technique for low-power multistage amplifiers
IEEE Journal of Solid-State Circuits, 2005Due to the rising demand for low-power portable battery-operated electronic devices, there is an increasing need for low-voltage low-power low-drop-out (LDO) regulators. This provides motivation for research on high-gain wide-bandwidth amplifiers driving large capacitive loads.
Edgar Sanchez-Sinencio
exaly +2 more sources
Design of a Three-Stage Amplifier with Single Miller Capacitor Feedforward Compensation
Advanced Materials Research, 2014An efficient three-stage amplifier with a new compensation method called single Miller capacitor feedforward compensation (SMFFC) which is suitable for large capacitive load applications are introduced in this paper. The overall layout area of the amplifier can be significantly reduced without influencing their stability by using a single Miller ...
Lin Hai Cui, Xue Bin Lu, Yang Guang
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Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers
International Journal of Circuit Theory and Applications, 2007AbstractA frequency compensation technique for three‐stage amplifiers is introduced. The proposed solution exploits only one Miller capacitor and a resistor in the compensation network. The straightness of the technique is used to design, using a standard CMOS 0.35‐µm process, a 1.5‐V OTA driving a 150‐pF load capacitor.
Salvatore Pennisi, Gaetano Palumbo
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A Transient-Enhanced Output-Capacitor-Free Low-Dropout Regulator With Dynamic Miller Compensation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019A transient-enhanced output-capacitor-free low-dropout regulator (LDR) based on dynamic Miller compensation (DMC) is presented in this brief. By utilizing different Miller capacitors to compensate the LDR at different load ranges, the proposed DMC technique can extend the loop bandwidth and enhance the transient performances.
Chenchang Zhan +2 more
exaly +4 more sources
2017 30th IEEE International System-on-Chip Conference (SOCC), 2017
This paper presents a constant bandwidth switched-capacitor programmable-gain amplifier (SC-PGA). By using an adaptive Miller compensation technique for the SC-PGA, our SC-PGA achieves low power consumption and high linearity at various gain conditions.
Suhwan Kim
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This paper presents a constant bandwidth switched-capacitor programmable-gain amplifier (SC-PGA). By using an adaptive Miller compensation technique for the SC-PGA, our SC-PGA achieves low power consumption and high linearity at various gain conditions.
Suhwan Kim
exaly +2 more sources
2019 IEEE 4th International Future Energy Electronics Conference (IFEEC), 2019
A more accurate miller capacitor model is proposed in this paper to achieve precise SiC switching characteristic prediction for high frequency and high power density designs. The SPICE models of power transistors are either not provided or fail to represent parasitic capacitor accurately, which will lead to poor estimation of device switching loss. For
Jimin Chen, Han Peng
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A more accurate miller capacitor model is proposed in this paper to achieve precise SiC switching characteristic prediction for high frequency and high power density designs. The SPICE models of power transistors are either not provided or fail to represent parasitic capacitor accurately, which will lead to poor estimation of device switching loss. For
Jimin Chen, Han Peng
exaly +2 more sources