Results 121 to 130 of about 370 (180)

Smart structural health monitoring (SHM) system for on-board localization of defects in pipes using torsional ultrasonic guided waves. [PDF]

Sci Rep
Patil S, Banerjee S, Tallur S.
europepmc   +1 more source

SpChipADF: An Architecture Design Framework for Radar Signal Processing Hardware Accelerators. [PDF]

Micromachines (Basel)
Wang H, Yang S, Chen Z, Sun H, Shen Y, Li H, Jiang Z, Li Y, Liang X.   +8 more
europepmc   +1 more source

Precision encoder grating mounting: a near-sensor computing approach. [PDF]

Sci Rep
Yu J, Dou R, Zhang W, Wang X, Xu J, Liu J, Wu N, Liu L.   +7 more
europepmc   +1 more source

Speed up integer-arithmetic-only inference via bit-shifting. [PDF]

Sci Rep
Song M, Zhou Y, Song M, Liu S, Xiao S, Zheng Y.   +5 more
europepmc   +1 more source

Implementation of a High-Sensitivity Global Navigation Satellite System Receiver on a System-on-Chip Field-Programmable Gate Array Platform. [PDF]

Sensors (Basel)
Majoral M, Arribas J, Fernández-Prades C.   +2 more
europepmc   +1 more source

Some of the next articles are maybe not open access.

Related searches:

Security Vulnerabilities and Countermeasures in MPSoCs

IEEE Design & Test, 2021
Editor’s notes: This article deals with software attacks targeting multiprocessor systems-on-chip and proposes a set of countermeasures corresponding to lightweight mechanisms characterized by a small impact on the system performance and area, while still guaranteeing a good level of protection. — Marcelo Lubaszewki, Universidade Federal do Rio Grande
Anderson Camargo Sant'Ana, Henrique Martins Medina, Fernando Gehm Moraes   +2 more
openaire   +1 more source

Understanding MPSoCs

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, 2018
Multi-Processor Systems-on-Chips (MPSoCs) are the key enabler technology for current and future applications. However, the high on-chip connectivity, the programmability and IPs reusability, also introduce security concerns. Problems arise when applications with different trust and security levels share the MPSoC resources.
Sepulveda, Johanna, Reinbrecht, Cezar, Azad, Siavoosh Payandeh, Niazmand, Behrad, Jervan, Gert   +4 more
openaire   +2 more sources

CAESAR-MPSoC: Dynamic and Efficient MPSoC Security Zones

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019
Dynamic security zones in Multiprocessor System-on-Chip (MP-SoC) has been used to isolate sensitive applications from possible attackers. These physical wrappers are usually configured through programmable hardware firewalls. Previous works have shown the efficiency of this security mechanism against a wide variety of attacks.
Siavoosh Payandeh Azad, Gert Jervan, Michael Tempelmeier, Johanna Sepúlveda   +3 more
openaire   +1 more source

Mapping of applications to MPSoCs

Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, 2011
The advent of embedded many-core architectures results in the need to come up with techniques for mapping embedded applications onto such architectures. This paper presents a representative set of such techniques. The techniques focus on optimizing performance, temperature distribution, reliability and fault tolerance for various models.
Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee 0002, Qiang Xu 0001, Lin Huang 0002   +8 more
openaire   +1 more source