Results 141 to 150 of about 370 (180)
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Proactive temperature management in MPSoCs

Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08, 2008
Preventing thermal hot spots and large temperature variations on the die is critical for addressing the challenges in system reliability, performance, cooling cost and leakage power. Reactive thermal management methods, which take action after temperature reaches a given threshold, maintain the temperature below a critical level at the cost of ...
Ayse Kivilcim Coskun   +2 more
openaire   +1 more source

A Fault-Tolerant MPSoC For CubeSats

2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2019
We present the implementation of a fault-tolerant MP-SoC for very small satellites ( $W$ of total power consumption, which for the first time enables true fault-tolerance for very small spacecraft such as CubeSats. For critical space missions aboard heavier satellites, we implemented an MPSoC-variant for the space-grade XQRKU060 part together with the
Christian M. Fuchs   +9 more
openaire   +1 more source

Lightweight security mechanisms for MPSoCs

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019
Computational systems tend to adopt parallel architectures, by using multiprocessor systems-on-chip (MPSoCs). MPSoCs are vulnerable to software and hardware attacks, as infected applications and Hardware Trojans respectively. These attacks may have the purpose to gain access to sensitive data, interrupt a given application or even damage the system ...
Anderson Camargo Sant'Ana   +3 more
openaire   +1 more source

Precision Power Measurements of FPGA-MPSoCs

2021 IEEE 11th Annual Computing and Communication Workshop and Conference (CCWC), 2021
Considering a world of ever-increasing energy requirements and finite resources, power and energy measurements are vitally important. However, in the realm of FPGA-MPSoCs, existing software does not support the exact acquisition of sensor measurements, thereby reducing temporal precision.
Robert Drehmel, Markus Hefele
openaire   +1 more source

Dynamic Task Mapping for MPSoCs

IEEE Design & Test of Computers, 2010
Multiprocessor-system-on-a-chip (MPSoC) applications can consist of a varying number of simultaneous tasks and can change even after system design, enforcing a scenario that requires the use of dynamic task mapping. This article investigates dynamic task-mapping heuristics targeting reduction of network congestion in network-on-chip (NoC)-based MPSoCs.
Ewerson Luiz de Souza Carvalho   +2 more
openaire   +1 more source

A layered approach for fault tolerant NoC-based MPSoCs — Special session: Dependable MPSoCs

2016 17th Latin-American Test Symposium (LATS), 2016
Fault tolerant design has a key role in current nanometric technologies, leading to research on fault mitigation techniques for NoC-based MPSoCs. Most of the state-of-the-art papers present partial solutions to design a fault tolerant MPSoC, i.e., they present fault tolerant mechanisms for either NoCs or processing elements (PEs).
Eduardo Wächter   +4 more
openaire   +1 more source

Evaluating OpenMP Support Costs on MPSoCs

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, 2010
The ever-increasing complexity of MPSoCs is making the production of software the critical path in embedded system development. Several programming models and tools have been proposed in the recent past that aim at facilitating application development for embedded MPSoCs.
MARONGIU, ANDREA   +2 more
openaire   +3 more sources

Analyzing on-chip communication in a MPSoC environment

Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-processor system at the cycle-accurate and signal-accurate level. These features allow to stimulate the communication sub-system with functional traffic generated byreal ...
M. Loghi   +4 more
openaire   +5 more sources

Application-Level Memory Optimization for MPSoC

Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06), 2006
Multiprocessor System-on-Chip is one of the main drivers of the semiconductor industry revolution by enabling the integration of complex functionality on a single chip. Memory is becoming a key player for significant improvements in embedded systems (power, performance and area).
Bruno Girodias   +5 more
openaire   +2 more sources

Overview of the MPSoC design challenge

2006 43rd ACM/IEEE Design Automation Conference, 2006
We review the design challenges faced by MPSoC designers at all levels. Starting at the application level, there is a need for programming models and communications APIs that allow applications to be easily re-configured for many different possible architectures without tedious rewriting, while at the same time ensuring efficient production code ...
openaire   +1 more source

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