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Accelerating multi-core simulators
Proceedings of the 2010 ACM Symposium on Applied Computing, 2010Simulation is an important means of evaluating new microarchitectures. With the invention of multi-core (CMP) platforms, simulators are becoming larger and more complex. However, with the availability of CMPs with larger caches and higher operating frequency, the wall clock time required for simulating an application has become comparatively shorter ...
Aparna Mandke Dani +3 more
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A hyperscalar multi-core architecture
Proceedings of the 7th ACM international conference on Computing frontiers, 2010This paper proposes a reconfigurable multi-core architecture, called hyperscalar that enables many scalar cores to be united dynamically as a larger superscalar processor to accelerate a thread. To accomplish this, we propose the virtual shared register files (VSRF) that allow the instructions of a thread executed in the united cores to logically face ...
Jih-Ching Chiu +2 more
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14th International Conference on Parallel Architectures and Compilation Techniques (PACT'05), 2005
Summary form only given. It is likely that 2005 will be viewed as the year that parallelism came to the masses, with multiple vendors shipping dual/multi-core platforms into the mainstream consumer and enterprise markets. Assuming that this trend will follow Moore's Law scaling, mainstream systems will contain over 10 processing cores by the end of the
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Summary form only given. It is likely that 2005 will be viewed as the year that parallelism came to the masses, with multiple vendors shipping dual/multi-core platforms into the mainstream consumer and enterprise markets. Assuming that this trend will follow Moore's Law scaling, mainstream systems will contain over 10 processing cores by the end of the
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itit, 2010
Abstract Multi-cores are the contemporary solution to reach a high performance without the need of increasing the clock frequency. Multi-cores integrate two or more cores, i. e., processors, on a single die. Future multi-cores may comprise hundreds or even thousands of cores and arouse challenges for processor design, system architecture,
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Abstract Multi-cores are the contemporary solution to reach a high performance without the need of increasing the clock frequency. Multi-cores integrate two or more cores, i. e., processors, on a single die. Future multi-cores may comprise hundreds or even thousands of cores and arouse challenges for processor design, system architecture,
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Multi-Core Model Checking with SPIN
2007 IEEE International Parallel and Distributed Processing Symposium, 2007We present the first experimental results on the implementation of a multi-core model checking algorithm for the SPIN model checker. These algorithms specifically target shared-memory systems, and are initially restricted to dual-core systems. The extensions we have made require only small changes in the SPIN source code, and preserve virtually all ...
Holzmann, G.J., Bosnacki, D.
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2009 Design, Automation & Test in Europe Conference & Exhibition, 2009
High-end mobile phones support multiple radio standards and a rich suite of applications, which involves advanced radio, audio, video, and graphics processing. The overall digital workload amounts to nearly 100GOPS, from 4b integer to 24b floating-point operations.
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High-end mobile phones support multiple radio standards and a rich suite of applications, which involves advanced radio, audio, video, and graphics processing. The overall digital workload amounts to nearly 100GOPS, from 4b integer to 24b floating-point operations.
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2020
This section contains a moderately renovated proof of the main result of [KMP14] establishing the correctness of a multi core processor with pipelined processor cores.
Petro Lutsyk +2 more
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This section contains a moderately renovated proof of the main result of [KMP14] establishing the correctness of a multi core processor with pipelined processor cores.
Petro Lutsyk +2 more
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Multi-core design automation challenges
Proceedings of the 44th annual conference on Design automation - DAC '07, 2007The trend to multi-core chip designs presents new challenges for design automation, while the increased reuse of components may offer solutions. This paper describes some of the key challenges with attention paid to three enablers: a physical architecture to streamline chip integration, the linking of early analysis tools around shared data and an ...
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On the efficiency of Multi-core Grammatical Evolution (MCGE) evolving multi-core parallel programs
2014 Sixth World Congress on Nature and Biologically Inspired Computing (NaBIC 2014), 2014In this paper we investigate a novel technique that optimizes the execution time of Grammatical Evolution through the usage of on-chip multiple processors. This technique, Multicore Grammatical Evolution (MCGE) evolves natively parallel programs with the help of OpenMP primitives through the grammars, such that not only can we exploit parallelism while
Gopinath Chennupati +2 more
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uVMP: Virtualizable multi-core platform
2012 XXXVIII Conferencia Latinoamericana En Informatica (CLEI), 2012This paper aims to show the design and prototyping of a multi-core platform that includes hardware resources to multi-core embedded processor virtualization. The virtualization process may configure the cores' address space and the association of cores to create independents groups of cores inside the platform. The platform was prototyped and validated
Ivan Saraiva Silva +3 more
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