Results 11 to 20 of about 7,093 (165)

Phosphorene/rhenium disulfide heterojunction-based negative differential resistance device for multi-valued logic [PDF]

Nature Communications, 2016
Electronic devices based on negative differential resistance hold promise for multi-valued logic applications. Here, the authors implement such functionalities using an atomically thin phosphorene/rhenium disulfide van der Waals heterostructure, and ...
Jaewoo Shim, Seyong Oh, Dong-Ho Kang, Seo-Hyeon Jo, Muhammad Hasnain Ali, Woo-Young Choi, Keun Heo, Jaeho Jeon, Sungjoo Lee, Minwoo Kim, Young Jae Song, Jin-Hong Park   +11 more
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Energy-efficient design of CNTFET-based quaternary arithmetic circuits [PDF]

Scientific Reports
The vast interconnection between digital logic blocks is the main challenge faced in chip designing, which leads to increased area overheads and average power consumption.
Ajay Rupani, Deepika Bansal, Kulbhushan Sharma   +2 more
doaj   +2 more sources

Function of One Regular Separable Relation Set Decided for the Minimal Covering in Multiple Valued Logic

MATEC Web of Conferences, 2016
Multiple-valued logic is an important branch of the computer science and technology. Multiple-valued logic studies the theory, multiple-valued circuit & multiple-valued system, and the applications of multiple-valued logic included.In the theory of ...
Liu Yu Zhen, Liu Min, Liu Xing Bao, Zhang Xin Fen   +3 more
doaj   +1 more source

On Stability of Multi-Valued Nonlinear Feedback Shift Registers

Complexity, 2019
Nonlinear feedback shift registers (NFSRs) are the main building blocks in many convolutional decoders, and a stable NFSR can limit decoding error propagation.
Haiyan Wang, Qiuzhen Lin, Jianyong Chen, Jianqiang Li, Jianghua Zhong, Dongdai Lin, Jia Wang, Lijia Ma   +7 more
doaj   +1 more source

Comments on “High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits”

IEEE Access, 2020
In the above article [1], R. A. Jaber et al. present the designs of ternary logic circuits based on CNTFET technology. The motivation for designing ternary gates is based on the following assumption quoted in the abstract: “Moreover, multi-valued ...
Daniel Etiemble
doaj   +1 more source

Non-Clausal Multi-ary α-Generalized Resolution Calculus for a Finite Lattice-Valued Logic

International Journal of Computational Intelligence Systems, 2018
Due to the need of the logical foundation for uncertain information processing, development of efficient automated reasoning system based on non-classical logics is always an active research area.
Yang Xu, Jun Liu, Xingxing He, Xiaomei Zhong, Shuwei Chen   +4 more
doaj   +1 more source

Calculation of the number of branches of multi-valued decision trees in computer aided importance rank of parameters

ITM Web of Conferences, 2017
An elaborated digital computer programme supporting the time-consuming process of selecting the importance rank of construction and operation parameters by means of stating optimum sets is based on the Quine – McCluskey algorithm of minimizing individual
Tiszbierek Agnieszka
doaj   +1 more source

Arithmetic Operations in Multi-Valued Logic

International journal of VLSI design & Communication Systems, 2010
This paper presents arithmetic operations like addition, subtraction and multiplications in Modulo-4 arithmetic, and also addition, multiplication in Galois field, using multi-valued logic (MVL). Quaternary to binary and binary to quaternary converters are designed using down literal circuits.
K. S. Vasundara Patel, K. S. Gurumurthy
openaire   +4 more sources

Identification of Influence of Part Tolerances of 3PWR-SE Pump On Its Total Efficiency Taking Into Consideration Multi-Valued Logic Trees

Polish Maritime Research, 2017
This paper presents the way of identifying the influence of the tolerance of model pumps (TYPE 3PWR-SE) construction on the total efficiency. The identification of sensitive control dimensions (Value/Tolerance) of examined pumps has been made by means of
Deptuła Adam, Osiński Piotr, Partyka Marian   +2 more
doaj   +1 more source

3vLTL: A Tool to Generate Automata for Three-valued LTL

Electronic Proceedings in Theoretical Computer Science, 2023
Multi-valued logics have a long tradition in the literature on system verification, including run-time verification. However, comparatively fewer model-checking tools have been developed for multi-valued specification languages.
Belardinelli, Francesco, Ferrando, Angelo, Malvone, Vadim   +2 more
doaj   +1 more source