Ternary Logic with Stateful Neural Networks Using a Bilayered TaOX-Based Memristor Exhibiting Ternary States [PDF]
Advanced Science, 2022 A memristive stateful neural network allowing complete Boolean inâmemory computing attracts high interest in future electronics. Various Boolean logic gates and functions demonstrated so far confirm their practical potential as an emerging computing ...
Kyung Min Kim +2 more
exaly +3 more sources
Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process [PDF]
Nano Convergence, 2023 A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT).
Yongsu Lee +8 more
doaj +2 more sources
A reconfigurable binary/ternary logic conversion-in-memory based on drain-aligned floating-gate heterojunction transistors [PDF]
Nature Communications, 2023 A new type of heterojunction non-volatile memory transistor (H-MTR) has been developed, in which the negative transconductance (NTC) characteristics can be controlled systematically by a drain-aligned floating gate.
Chungryeol Lee +5 more
doaj +2 more sources
Ternary Logic Design Based on Novel Tunneling-Drift-Diffusion Field-Effect Transistors [PDF]
NanomaterialsIn this paper, a novel Tunneling-Drift-Diffusion Field-Effect Transistor (TDDFET) based on the combination of the quantum tunneling and conventional drift-diffusion mechanisms is proposed for the design of ternary logic circuits. The working principle of
Bin Lu +7 more
doaj +2 more sources
IEEE Access, 2020 In this paper, the design of ternary logic gates (standard ternary inverter, ternary NAND, ternary NOR) based on carbon nanotube field effect transistor (CNTFET) and resistive random access memory (RRAM) is proposed.
Sohiful Anuar Zainol Murad +2 more
exaly +3 more sources
Applied Sciences (Switzerland), 2019 With the approaching end of Moore’s Law (that the number of transistors in a dense integrated circuit doubles every two years), the logic data density in modern binary digital integrated circuits can hardly be further improved due to the physical ...
Beng Kang Tay +2 more
exaly +3 more sources
Design of Ternary Logic and Arithmetic Circuits Using GNRFET
IEEE Open Journal of Nanotechnology, 2020 Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
Zarin Tasnim Sandhie, Masud H Chowdhury
exaly +3 more sources
Design and Application of Memristive Balanced Ternary Univariate Logic Circuit
Micromachines, 2023 This paper proposes a unique memristor-based design scheme for a balanced ternary digital logic circuit. First, a design method of a single-variable logic function circuit is proposed.
Herbert Ho-Ching Iu +2 more
exaly +3 more sources
A light-driven multi-state heterojunction transistor for optoelectronic ternary logic circuits [PDF]
Nature CommunicationsA multi-state transistor that converts optical inputs into discrete logic outputs provides a device-level framework for optoelectronic computing beyond the binary paradigm.
Chungryeol Lee +7 more
doaj +2 more sources
Binary and ternary logic-in-memory using nanosheet feedback field-effect transistors with triple-gated structure [PDF]
Scientific ReportsIn this study, we demonstrate binary and ternary logic-in-memory (LIM) operations of inverters and NAND and NOR gates comprising nanosheet (NS) feedback field-effect transistors (FBFETs) with a triple-gated structure. The NS FBFETs are reconfigured in p-
Jongseong Han +4 more
doaj +2 more sources