Ternary Electronic Logic Systems Automation: A Novel Study Based on VHDL Language – Second Part: Ternary Combination Logic Components [PDF]
, 2018 سيتم في هذه الورقة العلمية بناء المرحلة الثانية من المكتبة البرمجية المؤسسة على لغة الـ VHDL للقطع التجميعية الثلاثية الأساسية بدءاً بالقطعة TXOR (Ternary XOR gate) وختاماً بالقطعة TPA (Ternary Parallel Adder)، وهذه المرحلة الثانية امتداداً لمكتبة ...
الحميدي, عبدالله علي قاسم +1 more
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New ternary inverter with memory function using silicon feedback field-effect transistors
Scientific Reports, 2022 In this study, we present a fully complementary metal–oxide–semiconductor-compatible ternary inverter with a memory function using silicon feedback field-effect transistors (FBFETs). FBFETs operate with a positive feedback loop by carrier accumulation in
Jaemin Son, Kyoungah Cho, Sangsig Kim
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Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders
IEEE Access, 2021 Multiple-Valued Logic systems present significant improvements in terms of energy consumption over binary logic systems. This paper proposes new ternary combinational digital circuits that reduce energy consumption in low-power nano-scale embedded ...
Jihad Mohamed Aljaam +2 more
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Ternary DDCVSL: a combined dynamic logic style for standard ternary logic with single power source
IET Computers & Digital Techniques, 2020 Every logic style has certain advantages for a specific application. Therefore, it is essential to introduce and investigate different logic styles. Differential cascode voltage switch logic (DCVSL) with the inherent redundancy is known to be an ideal logic style for error detection applications.
Nooshin Azimi +3 more
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An RTL-Based General Synthesis Methodology for Device-Independent Ternary Logic Circuits
IEEE AccessTernary logic circuits are considered a high-potential alternative that can continue the technological advance of binary logic. Current studies in ternary logic focus on two aspects: One focuses on designing specific ternary circuits (such as adders ...
Hanmok Park +3 more
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From static ternary adders to high-performance race-free dynamic ones
The Journal of Engineering, 2015 This study explores the suitability of dynamic logic style in ternary logic. It presents high-performance dynamic ternary half and full adders, which are essential components in computer arithmetic.
Shirin Rezaie +4 more
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A balanced Memristor-CMOS ternary logic family and its application [PDF]
, 2023 The design of balanced ternary digital logic circuits based on memristors and conventional CMOS devices is proposed. First, balanced ternary minimum gate TMIN, maximum gate TMAX and ternary inverters are systematically designed and verified by simulation,
Iu, Herbert Ho-Ching +7 more
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Halvor64/Ternary-logic-function-circuit-generator: Ternary logic function circuit generator [PDF]
, 2020 generates a netlist from a truth ...
Halvor Risto
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Design and Simulation of Balanced Ternary Priority Encoder
Memories - Materials, Devices, Circuits and SystemsThe priority encoder is a frequently used circuit in binary logic and is mostly used for interrupt handling and other priority resolving tasks. On the other hand, Ternary computing has tremendous potential for handling a wide variety of functions ...
Aadarsh Ganesh Goenka +3 more
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Micromachines, 2021 Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated.
Furqan Zahoor +4 more
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