Results 11 to 20 of about 3,208 (250)
Ternary combinational logic gate design based on tri-valued memristors
Frontiers in Physics, 2023 Traditional binary combinational logic circuits are generally obtained by cascading multiple basic logic gate circuits, using more components and complicated wiring.
Xiao-Jing Li +6 more
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Ternary logic in parallel multipliers [PDF]
The Computer Journal, 1972 The logic cost and speed of parallel multipliers implemented in both binary and ternary logic is studied. Binary operand lengths of 8 through 32 bits and the corresponding ternary digit range of 6 through 21 are considered. For the particular design technique used, the b i i r y versions are slightly faster where the speed criterion is in terms of the ...
Zvonko G. Vranesic, V. Carl Hamacher
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DESIGN AND SYNTHESIS OF TERNARY LOGIC ELEMENTS
Компютерні системи та інформаційні технології, 2022 The aim of this paper is creating some ternary elements. The threshold element of ternary logic on bipolar transistors and elements of ternary systems based on it are considered. The main disadvantages of this approach are identified. The multi-threshold
LARYSA MARTYNOVYCH +3 more
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Advanced Electronic Materials, 2023 In this study, the logic‐in‐memory operations are demonstrated of ternary NAND and NOR logic gates consisting of double‐gated feedback field‐effect transistors.
Jaemin Son +3 more
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Design and Application of Memristive Balanced Ternary Univariate Logic Circuit
Micromachines, 2023 This paper proposes a unique memristor-based design scheme for a balanced ternary digital logic circuit. First, a design method of a single-variable logic function circuit is proposed.
Xiaoyuan Wang +4 more
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Performance analysis of 4-bit ternary adder and multiplier using CNTFET for high speed arithmetic circuits [PDF]
E3S Web of Conferences, 2023 Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
C. Venkataiah +6 more
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Design of ternary full-adder and full-subtractor using pseudo NCNTFETs
e-Prime: Advances in Electrical Engineering, Electronics and Energy, 2023 Now-a-days, the binary logic system has intensified by scaling the field effect transistor (FET). However, due to the effectiveness of scaling the FET, ternary logics became more popular.
SV RatanKumar +2 more
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Two Efficient Ternary Adder Designs Based On CNFET Technology [PDF]
Computer and Knowledge Engineering, 2021 Full adder is one of the essential circuits among the various processing elements used in VLSI and other technologies circuits, because they are mainly employed in other arithmetic circuits, such as multi-digit adders, subtractors, and multipliers.
Masoud Mahjoubi +3 more
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The ternary quantum-dot cell and ternary logic [PDF]
Nanotechnology, 2006 Quantum-dot cellular automata (QCAs) are increasingly becoming one of the most promising candidates for the alternative processing platform of the future. Since their advent in the early 1990s the required technological processes, as well as the QCA structures that implement the basic and functionally complete set of binary logic functions, have been ...
I Lebar Bajec, N Zimic, M Mraz
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An asynchronous ternary logic signaling system [PDF]
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2003 This paper presents a new approach to an on-chip asynchronous transmission system suitable for next generation asynchronous on-chip networks. It implements multivalued logic to reduce the number of wires and a low-voltage swing for lower dynamic power dissipation.
T. Felicijan, Stephen B. Furber
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