Results 101 to 110 of about 363,421 (243)
Five-level selective harmonic elimination PWM strategies and multicarrier phase-shifted sinusoidal PWM: A comparison [PDF]
The multicarrier phase-shifted sinusoidal pulse-width modulation (MPS-SPWM) technique is well-known for its important advantage of offering an increased overall bandwidth as the number of carriers multiplied with their equal frequency directly controls ...
Cossar, C. +3 more
core
A non‐filamentary self‐rectifying HfO2/TiOx resistive random‐access memory integrates H2 annealing with an incremental step pulse with verify algorithm to achieve stable and linear analog conductance modulation. The device enables low‐current 6‐bit multilevel operation while suppressing sneak current in crossbar arrays. Implemented in Transformer‐based
Seonjeong Lee +5 more
wiley +1 more source
Hierarchical Multi‐Mode Computing in Interlayer‐Coupled 3D RRAM Crossbar Arrays
2‐deck RRAM crossbar array provides a versatile hardware platform for multifunctional in‐memory computing. Stacked, series, and entropy node configurations enable multi‐layer conductance modulation, logic‐in‐memory operation, genetic learning, and reconfigurable physical unclonable functions.
Seungman Park +7 more
wiley +1 more source
An antiferroelectric tunnel junction serves as a reservoir computing node, where field‐induced phase transitions and spontaneous ZrO2 relaxation deliver nonlinear fading memory. An In‐Ga‐Zn oxide interlayer enlarges the memory margin and multibit state richness.
Taegyu Kwon +13 more
wiley +1 more source
A Novel Fault-Tolerant Single-Phase Multilevel Inverter for Reliable UPS Applications
In this work, a multilevel inverter with the feature of single and multiswitch fault-tolerant capability is proposed for ensuring uninterrupted power supply in emergency load applications. By integrating a redundant unit into the multilevel inverter, the
Balram Kumar +2 more
doaj +1 more source
Integration of Reconfigurable p‐Bit and 1R Crossbar Array for Memristive Probabilistic Computing
A memristive probabilistic computing system is demonstrated by integrating stochastic p‐bits based on volatile memristors with a 1R crossbar array encoding interaction weights. The system performs weighted‐sum operations across the array and updates p‐bits iteratively.
Keunho Soh +7 more
wiley +1 more source
Battery‐Inspired Electrochemical Synapses for Neuromorphic Applications
Battery‐ion‐inspired synaptic devices integrate diverse electrolyte systems (solid, ion‐gel, liquid) with transition metal oxides, two‐dimensional materials, and organic channels to regulate ion‐electron coupling. By tailoring ion transport and host interactions, these platforms enable controllable plasticity and energy‐efficient implementations for ...
Won Woo Lee +6 more
wiley +1 more source
Voltage Monitoring on Capacitor of Modular Multilevel Converter
A modular multilevel converter is an attractive solution for power conversion without transformers. As modular multilevel converter consists of cascade connections and floating dc capacitors, it requires continuous voltage monitoring.
Ribickis, Leonīds, Steiks, Ingars
core
Whole‐blood biomimetic engineering transforms liquid metal nanoparticles into a tripartite immunotherapeutic platform that orchestrates regulatory T‐cell depletion, photothermal‐induced immunogenic cell death, and activation of the stimulator of interferon genes pathway.
Nina Sang, Eijiro Miyako
wiley +1 more source
A conformal ALD‐IGZO vertical RRAM integrates volatile and nonvolatile switching within a compact 2F architecture. Before forming, tunable volatile dynamics provide fading‐memory reservoir states, while after forming, stable multilevel conductance modulation enables hardware readout.
Seeun Lee +6 more
wiley +1 more source

