Multiple-valued logic design based on the multiple-peak BiCMOS-NDR circuits
Three different multiple-valued logic (MVL) designs using the multiple-peak negative-differential-resistance (NDR) circuits are investigated. The basic NDR element, which is made of several Si-based metal-oxide-semiconductor field-effect-transistor (MOS)
Kwang-Jow Gan +4 more
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Small polaron-mediated zero differential transconductance of 2D semiconductor/CoFe2O4 heterojunctions for plateau transistor applications [PDF]
The binary paradigm of modern electronics imposes intrinsic limits on information density and energy efficiency. Zero differential transconductance (ZDT)-based multi-valued logic (MVL) offers a promising alternative, providing a compelling platform for ...
Hyokwang Park +9 more
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A novel, efficient CNTFET Galois design as a basic ternary-valued logic field [PDF]
Peiman Keshavarzian1, Mahla Mohammad Mirzaee21Kerman Branch, Computer Engineering Department, Islamic Azad University, Kerman, Iran; 2Science and Research Branch, Computer Engineering Department, IA University, Kerman, IranAbstract: This paper presents ...
Keshavarzian P, Mirzaee MM
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Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology [PDF]
:This paper presents a novel design of a ternary multiplierbased on graphene nanoribbon field-effect transistor(GNRFET). GNRFET, as a new material with superiorphysical and electronic properties, can be a good choiceinstead of conventional devices such ...
Zahra Rohani +1 more
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Diagnosing of a complex technical object in four-valued logic [PDF]
This paper presents the essence of an investigation of a complex technical object with the use of four-valued logic. To this end, an intelligent diagnostic system (DIAG 2) is described.
Stanisław Duer +3 more
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Multiple-Valued Logic Modelling for Agents Controlled via Optical Networks
The methods of data verification are discussed, which are intended for the distant control of autonomous mobile robotic agents via networks, combining optical data links.
Alexey Yu. Bykovsky
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Examination of informativeness of diagnoses expressed with multiple-valued logic [PDF]
This paper presents the essence of an examination of informativeness in the diagnostic information outputs expressed with multiple-valued logic. The diagnostic test required for the examination was completed on wind turbine equipment.
Stanisław Duer +3 more
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Ternary combinational logic gate design based on tri-valued memristors
Traditional binary combinational logic circuits are generally obtained by cascading multiple basic logic gate circuits, using more components and complicated wiring.
Xiao-Jing Li +6 more
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DECOLib: A library of components for DECOmposition of discrete functions
Functional decomposition might be used during logic synthesis, machine learning, data mining and other domains. Decomposition of binary functions is widely used during LUT-based FPGA technology mapping.
Stanisław Deniziak, Mariusz Wiśniewski
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Performance analysis of 4-bit ternary adder and multiplier using CNTFET for high speed arithmetic circuits [PDF]
Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
C. Venkataiah +6 more
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