Results 81 to 90 of about 12,652 (226)
High-Speed Successive Approximation Register (SAR) ADC Design with Multiple Concurrent Comparators
High-performance integrated Analog-to-Digital Converters (ADC) play an indispensable role in digital processing since they are the interface circuits that bridge the analog world and digital regime.
Fu, Tao
core
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source
Low-resolution analog-to-digital converters (ADCs) offer a compelling approach to reducing power consumption and hardware complexity in large-scale multiple-input multiple-output (LS-MIMO) systems for next-generation wireless networks.
Duc A. Hoang +2 more
doaj +1 more source
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez +10 more
wiley +1 more source
On the Role of Preprocessing and Memristor Dynamics in Reservoir Computing for Image Classification
ABSTRACT Reservoir computing (RC) is an emerging recurrent neural network architecture that has attracted growing attention for its low training cost and modest hardware requirements. Memristor‐based circuits are particularly promising for RC, as their intrinsic dynamics can reduce network size and parameter overhead in tasks such as time‐series ...
Rishona Daniels +4 more
wiley +1 more source
This article presents a timing-skew-free time-interleaved (TI) successive-approximation register (SAR) analog-to-digital converter (ADC). By implementing an architecture with a single sample-and-hold (S/H) network, this design eliminates the need for a ...
Basak, Debajit +5 more
core +1 more source
In dynamic driving scenarios, the proposed approach ensures only temporally aligned sensor inputs to make driving decisions, preventing false activations. By enabling selective hardware‐level learning, it achieves fast, reliable responses under noisy conditions.
Kapil Bhardwaj +4 more
wiley +1 more source
Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source
저분해능 ADC 기반 저전력 무선통신을 위한 신호 처리 기법
학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2022.8,[v, 82 p. :]We propose signal processing techniques for millimeter wave (mmWave) massive multiple-input multiple-output (MIMO) systems with low-resolution analog-to-digital converters (ADCs).
김인수, Kim, In-soo
core
EMG‐Driven Telemetry and Inference System for Fish: Pose Reconstruction and Flow Sensing
This work introduces an electromyography (EMG)‐driven telemetry framework that reconstructs body pose and infers hydrodynamic conditions in freely swimming fish. A custom 16‐channel archival system records intramuscular EMG, enabling deep‐learning models to decode joint kinematics, classify flow regimes, and reveal channel‐efficient sensing strategies.
Rahdar Hussain Afridi +7 more
wiley +1 more source

