Results 141 to 150 of about 53,511 (199)

Design and simulation of a multistage interconnection network

1990
An interconnection network for a high-performance parallel computer for database, Lisp and Prolog applications is currently being developed. To meet the requirements derived from applications a multistage interconnection network is chosen. The selection of the switching elements and their optimization was done by simulation with randomly distributed ...
Rudolf Holzner, Stefan Tomann
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A multicast protocol in multistage interconnection networks

Proceedings Second International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN'96), 2002
Efficient collective communication among processor nodes is critical to the performance of massively parallel systems. A system-level multicast service in which the same message is delivered from a source node to an arbitrary number of destination nodes, is fundamental in supporting collective communication primitives including the application-level ...
Liquan Xiao, Mingxuan Zhang, Xingming Zhou   +2 more
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Multistage Interconnection Networks with Multiple Outlets

1994 International Conference on Parallel Processing-Vol 1 (ICPP'94), 1994
Multistage Interconnection Networks(MINs) with multiple outlets are networks which can support higher bandwidth than that of nonblocking networks by passing multiple packets to the same destination. A novel MIN topology with multiple outlets called Piled Banyan Switching Fabrics (PBSF) is proposed for the Simple Serial Synchronized (SSS)-MIN used in ...
Toshihiro Hanawa, Hideharu Amano, Yoshifumi Fujikawa   +2 more
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On the bandwidth availability of multistage interconnection networks

1993 Euromicro Workshop on Parallel and Distributed Processing, 2002
In this paper, we develop a model that describes the behaviour of a multistage interconnection network (MIN) interconnecting processors and memory modules, when faults exist among the functional units (the processors, memory modules, switching elements and links).
Andreas A. Veglis, Andreas S. Pombortsis
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Reliable multistage interconnection network design

Peer-to-Peer Networking and Applications, 2015
High-performance supercomputers generally comprise millions of CPUs in which interconnection networks play an important role to achieve high performance. New design paradigms of dynamic on-chip interconnection network involve a) topology b) synthesis, modeling and evaluation c) quality of service, fault tolerance and reliability d) routing procedures ...
S. Rajkumar 0002, Neeraj Kumar Goyal
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Conflict analysis of multistage interconnection networks

Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 2002
In most applications, some permutations are used more frequently than others. Therefore, it is necessary to determine the efficiency with which various MINs realize the set of frequently used permutations. It is known that the problem of determining the exact number of passes to realize a permutation is NP-complete. We present an efficient algorithm to
Yashovardhan R. Potlapalli, Dharma P. Agrawal   +1 more
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On the design of efficient multistage interconnection networks

Proceedings of MASCOTS '96 - 4th International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 2002
We present an algorithm that characterizes the set of permutations realizable in a single pass by a buddy-type MIN. We use the algorithm to develop a procedure that defines a buddy-type network which will realize a given set of permutations in a single pass through the network.
Yashovardhan R. Potlapalli, Dharma P. Agrawal   +1 more
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Multitasking in multistage interconnection network machines

[1992] Proceedings of the 12th International Conference on Distributed Computing Systems, 2003
Cubic and noncubic task allocation algorithms for multistage-interconnection-network (MIN)-based multiprocessors are presented. Conflicts in passage through the network and inability to partition the system effectively are the main bottlenecks in a MIN-based system.
Chansu Yu, Chita R. Das
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Study of multistage SIMD interconnection networks

Proceedings of the 5th annual symposium on Computer architecture - ISCA '78, 1978
Four SIMD multistage networks - Feng's data manipulator, STARAN flip network, omega network, and indirect binary n-cube—are analyzed. Three parameters - topology, interchange box, and control structure—are defined. It is shown that the latter three networks use equivalent topologies and differences in their capabilities result from the other parameters.
Howard Jay Siegel, S. Diane Smith
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Permutation Capability of Optical Multistage Interconnection Networks

Journal of Parallel and Distributed Computing, 2000
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Yuanyuan Yang 0001, Jianchao Wang, Yi Pan 0001   +2 more
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