Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source
Bridging neuromorphic computing and deep learning for next-generation neural data interpretation. [PDF]
Zhang M, Wang T, Zhu Z.
europepmc +1 more source
Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology
Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh +3 more
wiley +1 more source
Hafnium-Based Ferroelectric Post-Moore Electronics: Device Physics, Integration Architectures, and Neuromorphic System Implementation. [PDF]
Chen X, Wang Z, Meng J, Wang T.
europepmc +1 more source
Haptic In‐Sensor Computing Device Based on CNT/PDMS Nanocomposite Physical Reservoir
Using a porous carbon nanotube‐polydimethylsiloxane nanocomposite, a sensor array integrated with a physical reservoir computing paradigm capable of in‐sensor computing is demonstrated. The device is able to classify between nine objects with an accuracy above 80%, opening the possibility for low‐power sensing/computing for future robotics.
Kouki Kimizuka +7 more
wiley +1 more source
Dynamical and Stochastic Analysis of a Piezoelectric Neuron Model for Intelligent Sensing Applications. [PDF]
Abdelkader A, Ehsan H, Jhangeer A.
europepmc +1 more source
The systematic design of memristor‐based neural network is provided by analog conductance state parameters to accurately emulate the software‐based high‐resolution weight at discrete device level. The requirement of discrete analog conductance of memristor device is measured as ≈50 states with nonlinearity value of ≈0.142 within the deviation range of ...
Jingon Jang, Yoonseok Song, Sungjun Park
wiley +1 more source
Ultrafast visual perception beyond human capabilities enabled by motion analysis using synaptic transistors. [PDF]
Wang S +16 more
europepmc +1 more source
Hardware‐Based On‐Chip Learning Using a Ferroelectric AND‐Type Array With Random Synaptic Weights
This work demonstrates an energy‐efficient on‐chip learning system using an Metal‐Ferroelectric‐Insulator‐Semiconductor FeAND synaptic array. By employing a feedback alignment scheme with a separate backward array using fixed random weights, the system overcomes directional limitations of AND‐type arrays and achieves robust, low‐power learning suitable
Minsuk Song +8 more
wiley +1 more source
Towards Artificial Intelligence Hardware With 3D Integrated Ferroelectric Transistors. [PDF]
Seok H, Kim G, Son S, Choi H, Kim T.
europepmc +1 more source

