Results 241 to 250 of about 18,384 (300)

Programmable memristors with two-dimensional nanofluidic channels. [PDF]

Nat Commun
Ismail A, Nam GH, Lokhandwala A, Pandey SV, Saurav KV, You Y, Jyothilal H, Goutham S, Sajja R, Keerthi A, Radha B.   +10 more
europepmc   +1 more source

Effect of Electrode Tuning on the Resistive Switching Behaviour of MXene-Based Composites. [PDF]

Polymers (Basel)
Grácio M, Teixeira H, Dias C, Ventura J.   +3 more
europepmc   +1 more source

Temperature Gradients as a Data Storage Principle. [PDF]

Entropy (Basel)
Schoenmaker J, Martins PG, Teixeira JC.
europepmc   +1 more source

Investigation of Electron Transport Layer Influence on Asymmetric Bipolar Switching in Transparent BST-Based RRAM Devices. [PDF]

Micromachines (Basel)
Chen KH, Kao MC, Chen HC, Wang YC, Cheng CM, Xu WM.   +5 more
europepmc   +1 more source

Hafnium-Based Ferroelectric Diodes for Logic-in-Memory Application. [PDF]

Micromachines (Basel)
Han S, Zhang Y, Wang X, Tong P, Liu C, Zeng Q, Liu J, Huang X, Li Q, Cao R, Wang W.   +10 more
europepmc   +1 more source

Self-powered photo-pyroelectric sensing in antiferroelectric Hafnium zirconium memory with asymmetric van der Waals electrodes. [PDF]

Nat Commun
Gan X, Zhu L, Han J, Zuo X, Zheng C, Li W, Chu J, An Z.   +7 more
europepmc   +1 more source

Fast prototyping of memristors for ReRAMs and neuromorphic computing.

Nanoscale
Marraccini G, Strangio S, Dimaggio E, Sargeni R, Pieri F, Sozen Y, Castellanos-Gomez A, Fiori G.   +7 more
europepmc   +1 more source

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Non-volatile Memories

2017
This chapter describes the basic properties of various computer memories. Historical evolution of the roles of non-volatile functionalities in computer architecture is discussed to explain recent rejuvenating interest in new non-volatile memory technologies.
Shinobu Fujita, Masanori Hayashikoshi, Yoshikazu Fujimori   +2 more
exaly   +2 more sources

Dependable Non-Volatile Memory

Proceedings of the 11th ACM International Systems and Storage Conference, 2018
Recent advances in persistent memory (PM) enable fast, byte-addressable main memory that maintains its state across power cycling events. To survive power outages and prevent inconsistent application state, current approaches introduce persistent logs and require expensive cache flushes.
Arthur Martens, Rouven Scholz, Phil Lindow, Niklas Lehnfeld, Marc A. Kastner 0001, Rüdiger Kapitza   +5 more
openaire   +1 more source