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A high-performance buffer for non-volatile memories
9th International Conference on Electronics, Circuits and Systems, 2003In this paper, a CMOS data output buffer is proposed. The buffer shows high-speed performance together low noise characteristics. The performance is achieved by implementing a precharging of the output load. The buffer was developed with a 0.35 /spl mu/m CMOS technology and a 3.3 V power supply. Eldo simulations have been used to validate its features,
L. DE AMBROGGI +3 more
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Non-volatile memory and disks:
Proceedings of the 2007 ACM workshop on Computer security architecture, 2007As computing models change, so too do the demands on storage. Distributed and virtualized systems introduce new vulnerabilities, assumptions, and performance requirements on disks. However,traditional storage systems have very limited capacity to implement needed "advanced storage" features such as integrity and dataisolation.
Kevin R. B. Butler +2 more
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Statistical Cache Bypassing for Non-Volatile Memory
IEEE Transactions on Computers, 2016zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Guangyu Sun 0003 +4 more
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Keynote: “Non-volatile memory innovation”
2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014As flash memory gains its huge momentum in the storage market, people have high expectation on other potential roles that could be played by non-volatile memory. It has been a grand challenge to position selected non-volatile memory technologies in the memory hierarchy.
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NON-VOLATILE MEMORY AND METHOD FOR OPERATING A NON-VOLATILE MEMORY
2004A non-volatile memory (10) comprises an array (12) of individual memory cells (14), a read circuit (16) and an identifying circuit (18). The memory cells (14) of the array are individually capable of having a threshold voltage programmed or erased to an intended level within a range, the range being between range boundary levels.
MOTOROLA INC, WITTICH ENGELBERT
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Data Management in Non-Volatile Memory
Proceedings of the 2015 ACM SIGMOD International Conference on Management of Data, 2015Non-volatile memory promises to bridge the gap between main memory and secondary storage by offering a universal storage device. Its performance profile is unique in that its latency is close to main memory and it is byte addressable, but it exhibits asymmetric I/O in that writes are more expensive than reads.
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Ferroelectric non-volatile memory
Proceedings of the IEEE 1988 National Aerospace and Electronics Conference, 2003The development of a monolithic 512-bit ferroelectric nonvolatile memory addressed by CMOS circuitry is discussed. This development has demonstrated technical feasibility and has allowed the production of the first 16 K universal random access memory called UniRAM.
J. Evans, R. Womack, D. Toisch
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2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 2007
Hideto Hidaka, Yair Sofer
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Hideto Hidaka, Yair Sofer
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Non volatile semiconductor memories
1981 International Electron Devices Meeting, 1981This paper reviews progress in the development of nonvolatile semiconductor memories todate. A comparison of basic device concepts, charge transfer mechanisms and regions of charge transport provides the basis for projection of future trends and limitations, with emphasis on difficulties in research, development and product implementation of new device
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