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NON-VOLATILE MEMORY AND METHOD FOR OPERATING A NON-VOLATILE MEMORY
2004A non-volatile memory (10) comprises an array (12) of individual memory cells (14), a read circuit (16) and an identifying circuit (18). The memory cells (14) of the array are individually capable of having a threshold voltage programmed or erased to an intended level within a range, the range being between range boundary levels.
MOTOROLA INC, WITTICH ENGELBERT
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[1991] GaAs IC Symposium Technical Digest, 2002
A GaAs non-volatile memory that retains data without power by using a ferroelectric capacitor memory storage element has been developed. A complete 2 K/4 K bit ferroelectric random access memory (FERRAM) and two test modules have been fabricated. Initial results on the test modules and the FERRAM have demonstrated the feasibility of this approach. This
D.L. Harrington +12 more
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A GaAs non-volatile memory that retains data without power by using a ferroelectric capacitor memory storage element has been developed. A complete 2 K/4 K bit ferroelectric random access memory (FERRAM) and two test modules have been fabricated. Initial results on the test modules and the FERRAM have demonstrated the feasibility of this approach. This
D.L. Harrington +12 more
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Embedded Non-Volatile Memory Technologies
ECS Transactions, 2011The embedded Nonvolatile Memories (eNVM) technologies offer in-system re-programmability along with low voltage (LV), low power (LP), noise reduction, more reliable, and reduced system cost while maintain high speed, high density system performance over other NVM that including stand-alone Flash memory.
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Emerging non-volatile memories
2006The Workshop aims at providing an overview of the state of the art in the field of non volatile memories, touching on the various technologies which have been proposed in the last years. Contributions from industries, universities, and research laboratories will critically discuss their advances, open problems, perspectives and market outlook.
Agostino Pirovano +9 more
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Records of the 1993 IEEE International Workshop on Memory Testing, 2002
Some results from qualification test procedures on 64 k (4 designs) and 256 k (4 designs) EEPROM as well as 1 M (4 designs) flash memories are presented. Electrical characterization, various environmental tests, and reliability tests on up to about 220 devices per design were performed.
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Some results from qualification test procedures on 64 k (4 designs) and 256 k (4 designs) EEPROM as well as 1 M (4 designs) flash memories are presented. Electrical characterization, various environmental tests, and reliability tests on up to about 220 devices per design were performed.
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2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 2007
Hideto Hidaka, Yair Sofer
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Hideto Hidaka, Yair Sofer
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2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2008
Giulio Casagrande, Shine Chung
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Giulio Casagrande, Shine Chung
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