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Cascaded Transformers-Based Multilevel Inverters With NPC
IEEE Transactions on Industrial Electronics, 2022The basic structure and generalization of two cascaded transformer multilevel inverters (CTMIs) are proposed in this paper. Such configurations are based on cascaded symmetrical transformers coupled to two-level (2L) legs and three-level (3L) neutral-point clamped (NPC) legs. One configuration has a shared 2L leg, connected to all transformers.
Amanda Pereira Monteiro +3 more
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Optimal design of NPC and Active-NPC transformerless PV inverters
2012 3rd IEEE International Symposium on Power Electronics for Distributed Generation Systems (PEDG), 2012Targeting at a cost-effective deployment of grid-connected PhotoVoltaic (PV) systems, this paper presents a new methodology for the optimal design of transformerless PV inverters, which are based on the Neutral Point Clamped (NPC) and the Active-Neutral Point Clamped (ANPC) topologies. The design optimization results demonstrate that a different set of
S. Saridakis +2 more
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Cascaded impedance networks for NPC inverter
2010 Conference Proceedings IPEC, 2010Multilevel inverters are getting more and more attracted because they have better output waveform quality and lower semiconductor voltage stress. The Z-source NPC is a kind of single stage multilevel inverter which has the ability of voltage boost. But the boost capability is relatively low when they are subject to the renewable sources. To date, three
Li, Ding +4 more
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Thirteen level cascaded NPC inverter
2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel, 2010The paper presents a novel, thirteen level, and cascaded, neutral point clamped inverter. The inverter is modulated by phase disposition (PD) carrier based PWM method. The load of the inverter is a synchronous machine. The simulation results for different voltage levels, different modulation frequencies, and different carrier frequencies are presented.
Raul Rabinovici +3 more
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A 30kW transformer-less PV NPC inverter
2012 15th International Power Electronics and Motion Control Conference (EPE/PEMC), 2012Conventional PV power converters are usually based on configurations that include DC-DC boost converter stage, voltage source inverter stage, passive filter stage and grid interface isolation transformer, whose presence implies less efficiency and higher costs, in particular for medium size power PV converters.
CRESCIMBINI, Fabio +4 more
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Single phase ZVS PWM NPC inverter
XI Brazilian Power Electronics Conference, 2011This paper presents a zero-voltage, pulse width modulated, NPC inverter, with active voltage clamping using only two auxiliary switches. The structure is particularly simple and robust. It is very attractive for high-power applications, single or multiple phases, due to neutral point accessible at the NPC topology.
Eduardo Maldaun Barreto +2 more
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Experimental development of a hysteresis modulated NPC inverter
Proceedings of 2003 IEEE Conference on Control Applications, 2003. CCA 2003., 2004The paper presents the laboratory prototype realization of a system constituted by an IGBT based neutral point clamped (NPC) inverter, a driver stage and a digital control circuit board. A hysteresis control technique, developed by authors in previous papers, suitable for the current control of the NPC inverter is implemented in the control system. The
BELLINI A. +3 more
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A single-phase asymmetrical NPC inverter topology
2016 13th International Conference on Power Electronics (CIEP), 2016This paper presents a topology and a modulation scheme for a single-phase multi-level inverter referred as asymmetrical NPC. The proposed topology is formed by two legs, namely, a NPC and a standard two-level leg, where The NPC leg allows access to the middle point of the DC source.
M. J. Lopez-Sanchez +6 more
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SVM algorithm of three-level NPC inverter
2008 3rd IEEE Conference on Industrial Electronics and Applications, 2008On the basis of presenting the principles of space vector modulation (svm) of three-level neutral point clamped (NPC) inverter, an approach to implementation of SVM is proposed. The dwell times of vectors are calculated according to the volt-second balancing. A triangle is adopted to compare with three switching points.
null Shanmei Cheng +2 more
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Supraharmonics reduction in NPC inverter with random PWM
2017 IEEE 26th International Symposium on Industrial Electronics (ISIE), 2017The international standardization community is currently reviewing the harmonic distortion limits in the frequency range 2 to 150 kHz, referred to as supraharmonics. Power electronics has emerged as a ubiquitous technology, which also plays a critical role in this subject.
Aurora Gil-de Castro +5 more
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