Results 121 to 130 of about 393,601 (145)
Length-Weight Distribution of Non-Zero Elements in Randomized Bit Sequences. [PDF]
Lange C +3 more
europepmc +1 more source
Efficient Multiplier and FPGA Implementation for NTRU Prime
As quantum computing age is emerging on horizon, many of the current cryptography standards, e.g., RSA and Elliptic Curve Cryptography, are shown to be compromised under quantum attacks according to Shor's algorithm. A multiple-round competition has been launched by NIST to decide the next generation post-quantum cryptography (PQC) standards since 2017.
Xi Gao, Huapeng Wu
exaly +3 more sources
A Constant Time Full Hardware Implementation of Streamlined NTRU Prime
This paper presents a constant time hardware implementation of the NIST round 2 post-quantum cryptographic algorithm Streamlined NTRU Prime. We implement the entire KEM algorithm, including all steps for key generation, encapsulation and decapsulation, and all en- and decoding. We focus on optimizing the resources used, as well as applying optimization
Adrian Marotzke
exaly +4 more sources
A Proposal for Efficient Multiplication and Inverse Calculation in Streamlined NTRU Prime
Yasuyuki Nogami, Yuta Kodera
exaly +3 more sources
FPTRU: Optimization of NTRU-Prime and TLS Performance Assessment
Xinyu Hu +5 more
exaly +3 more sources
Algorithmic Views of Vectorized Polynomial Multipliers – NTRU Prime
Bo-Yin Yang
exaly +5 more sources
Analysis of Asymmetric NTRU Prime IIT Ukraine Encryption Algorithm With Regards to Known Attacks
I D Gorbenko
exaly +3 more sources
Secure and efficient hardware implementations of NTRU Prime
Streamlined NTRU Prime ist ein Kryptographischer Algorithmus mit dem Ziel, das Risiko von gitterbasiertem KEM zu senken, bei einer nur niedrigem Leistungseinbuße. Wir untersuchen, inwieweit diese Leistungseinbußen auch für Hardwareimplementierungen gelten und ob wir diese mit spezialisierten Designs weiter mindern können.
Marotzke, Adrian
openaire +2 more sources
Algorithmic Views of Vectorized Polynomial Multipliers for NTRU and NTRU Prime (Long Paper). [PDF]
This paper explores the design space of vector-optimized polynomial multiplications in the lattice-based key-encapsulation mechanisms NTRU and NTRU Prime.
Han-Ting Chen +4 more
core +3 more sources

