Results 151 to 160 of about 3,560 (214)

Reconfigurable Sequential-Logic-in-Memory Implementation Utilizing Ferroelectric Field-Effect Transistors. [PDF]

ACS Nano
Niu J, Kim D, Li J, Lyu J, Lee Y, Lee S.
europepmc   +1 more source

Skin mycosis distribution, and burden of visits over a decade in Colombia: ecological study. [PDF]

IJID Reg
Teherán AA, Camero-Ramos G, Pombo LM, Martínez NV, Díaz LC, Ayala KP, Zuluaga-Ortiz CA, Hamann-Echeverri O.   +7 more
europepmc   +1 more source

Assessing vaginal microbiome through Vaginal Microecology Evaluation System as a predictor for in vitro fertilization outcomes: a retrospective study. [PDF]

Front Endocrinol (Lausanne)
Tian Q, Jin S, Zhang G, Liu Y, Liu J, Tang X, Li Y, Liu J, Liu Y, Wang Z.   +9 more
europepmc   +1 more source

Self-powered photo-pyroelectric sensing in antiferroelectric Hafnium zirconium memory with asymmetric van der Waals electrodes. [PDF]

Nat Commun
Gan X, Zhu L, Han J, Zuo X, Zheng C, Li W, Chu J, An Z.   +7 more
europepmc   +1 more source

Desmin-related myopathy manifested by various types of arrhythmias: a case report and literature review. [PDF]

J Int Med Res
Geng L, Wang M, Wang K, Xu L, Li J, Liu F, Lu J.   +6 more
europepmc   +1 more source

Effective Aerosol Inoculation of Dose-Escalated Seasonal Influenza H3N2 Virus in Controlled Human Infection Model

Rouphael N, Tanios R, Traenkner J, Pauly MD, Shetty N, Shephard MJ, Campbell A, Radi C, Danzy S, Pan J, Flu CHIM Study Group, Catchpole AP, Mann A, Detelich JF, Lowen AC, Marr LC, Lakdawala SS.   +16 more
europepmc   +1 more source

Some of the next articles are maybe not open access.

Related searches:

NVM Way Allocation Scheme to Reduce NVM Writes for Hybrid Cache Architecture in Chip-Multiprocessors

IEEE Transactions on Parallel and Distributed Systems, 2017
Hybrid cache architectures (HCAs) containing both SRAM and non-volatile memory (NVM) have been proposed to overcome the disadvantages of NVM-based cache architecture. Most previous works have concentrated on managing write-intensive blocks by storing these blocks to SRAM to reduce the number of the write operations to NVM.
Gi-Ho Park
exaly   +2 more sources

NVM express drives and digital forensics

Digital Investigation, 2016
This paper provides an overview of NVME technology and discusses the relevance to the digital forensics community. The NVM Express standard defines an interface and command set for communication between a host and non-volatile memory devices (SSD's). It allows the direct attachment of SSD storage to the PCI Express bus using PCIe slots, M.2, and U.2 ...
exaly   +2 more sources

J-NVM

Proceedings of the ACM SIGOPS 28th Symposium on Operating Systems Principles, 2021
This paper presents J-NVM, a framework to access efficiently Non-Volatile Main Memory (NVMM) in Java. J-NVM offers a fully-fledged interface to persist plain Java objects using failure-atomic blocks. This interface relies internally on proxy objects that intermediate direct off-heap access to NVMM.
Lefort, Anatole, Pipereau, Yohan, Amponsem, Kwabena, Sutra, Pierre, Thomas, Gaël   +4 more
openaire   +2 more sources