Results 51 to 60 of about 505 (135)
Reliability Aspects of 28 nm BEOL‐Integrated Resistive Switching Random Access Memory
Cooperation between RWTH Aachen and Infineon Technologies investigates the key reliability aspects of resistive‐switching valence change memory (VCM redox‐based resistive switching random access memory), being variability, retention, and endurance. Experimental data on a Mbit scale are presented for VCM devices integrated into 28 nm CMOS.
Stefan Wiefels +6 more
wiley +1 more source
Learning is crucial for the brain’s ability to adapt to changing conditions. We suggest a collection of novel neuromorphic construction circuits, adjustable synapse circuits, and CMOS Spike Based Driven Synaptic Plasticity (CSBDSP) erudition algorithm ...
Joshika Sharma +2 more
doaj +1 more source
Challenges and examples of in-situ memory content extraction techniques [PDF]
We present embedded devices memory elements - from core registers to off chip-use, type and architecture before summarising their features regarding extraction techniques at scale. We list recent and on-going attack platform methodologies prior analysing
Courbon, Franck Rene
core +1 more source
Dynamics of Analog Switching Behavior in Thin Polycrystalline Barium Titanate
Engineering of interfaces and point defects in ferroelectric memristors provides a powerful tool to design non‐volatile memory devices for neuromorphic computing. The developed novel drift‐diffusion model built on a memristive device of mixed electron‐ionic nature can be used to predict the resistive switching effects based on the combined contribution
Natalia V. Andreeva +4 more
wiley +1 more source
Crossbar-aware neural network pruning
Crossbar architecture based devices have been widely adopted in neural network accelerators by taking advantage of the high efficiency on vector-matrix multiplication (VMM) operations.
Deng, Lei +7 more
core +1 more source
Heavy Ion Irradiation Hardening Study on 4kb arrays HfO2-based OxRAM
HfO$_2$ based OxRAM devices integrated in Back End Of Line (BEOL) of 130nm CMOS have been exposed to extreme irradiation conditions related to extensive journey in space, supernova or nuclear disaster exposure: 1.635 GeV Au ion energy and very high fluences, from 10$^9$ ions/cm² to 10$^{12}$ ions/cm².
N. Guillaume +12 more
openaire +2 more sources
Switching event detection and self-termination programming circuit for energy efficient ReRAM memory arrays [PDF]
Energy efficiency remains a challenge for the design of non-volatile resistive memories (ReRAMs) arrays. This memory technology suffers from intrinsic variability in switching speed, programming voltages and resistance levels.
Alayan, Mouhamad +8 more
core +1 more source
A versatile compact model of resistive random-access memory (RRAM) [PDF]
We present a versatile compact model for resistive random-access memory (RRAM) that can model different types of RRAM devices such as oxide-RRAM (OxRAM) and conducting-bridge-RRAM (CBRAM).
Dabhi, Chetan Kumar +3 more
core +1 more source
Design Exploration of Hybrid CMOS-OxRAM Deep Generative Architectures
Deep Learning and its applications have gained tremendous interest recently in both academia and industry. Restricted Boltzmann Machines (RBMs) offer a key methodology to implement deep learning paradigms. This paper presents a novel approach for realizing hybrid CMOS-OxRAM based deep generative models (DGM).
Parmar, Vivek, Suri, Manan
openaire +2 more sources
Treated HfO2 based rram devices with ru, tan, tin as top electrode for in-memory computing hardware [PDF]
The scalability and power efficiency of the conventional CMOS technology is steadily coming to a halt due to increasing problems and challenges in fabrication technology.
Patel, Yuvraj Dineshkumar
core +1 more source

