Results 21 to 30 of about 127,524 (200)
LIKWID: Lightweight Performance Tools [PDF]
, 2012 Exploiting the performance of today's microprocessors requires intimate knowledge of the microarchitecture as well as an awareness of the ever-growing complexity in thread and cache topology.
Hager, Georg +2 more
core +1 more source
SQLite Page Caching Algorithm [PDF]
, 2022 <p>[Introduction]: "SQLite is a database which can be easily embedded inside an application written in the C programming language. One common use is inside the Mozilla Firefox web browser. It supports asubset of the SQL language but was not intended to be a replacement for a multi-user database suchas MySQL, Oracle or Microsoft SQL Server.The ...
openaire +1 more source
Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture
Applied Sciences, 2022 Non-volatile memories (NVMs) have aroused vast interest in hybrid memory systems due to their promising features of byte-addressability, high storage density, low cost per byte, and near-zero standby energy consumption.
Ye Chi +4 more
doaj +1 more source
SEV-Step A Single-Stepping Framework for AMD-SEV
Transactions on Cryptographic Hardware and Embedded Systems, 2023 The ever increasing popularity and availability of Trusted Execution Environments (TEEs) had a stark influence on microarchitectural attack research in academia, as their strong attacker model both boosts existing attack vectors and introduces several ...
Luca Wilke +3 more
doaj +1 more source
An O(log k)-competitive algorithm for generalized caching [PDF]
, 2018 In the generalized caching problem, we have a set of pages and a cache of size k. Each page p has a size wpe1 and fetching cost cp for loading the page into the cache.
Adamaszek, Anna +3 more
core +1 more source
Vanguard: A Cache-Level Sensitive File Integrity Monitoring System in Virtual Machine Environment
IEEE Access, 2018 Sensitive files in computer systems such as executable programs, configuration, and authorization information have a great importance of their own, in terms of both confidentiality and functionality.
Bin Shi, Bo Li, Lei Cui, Liu Ouyang
doaj +1 more source
Revisiting the Design of Parallel Stream Joins on Trusted Execution Environments
Algorithms, 2022 The appealing properties of secure hardware solutions such as trusted execution environment (TEE) including low computational overhead, confidentiality guarantee, and reduced attack surface have prompted considerable interest in adopting them for secure ...
Souhail Meftah +3 more
doaj +1 more source
MARACAS: a real-time multicore VCPU scheduling framework [PDF]
, 2016 This paper describes a multicore scheduling and load-balancing framework called MARACAS, to address shared cache and memory bus contention. It builds upon prior work centered around the concept of virtual CPU (VCPU) scheduling.
Cheng, Zhuoqun +3 more
core +1 more source
Paging for multi-core shared caches [PDF]
Proceedings of the 3rd Innovations in Theoretical Computer Science Conference, 2012 Paging for multi-core processors extends the classical paging problem to a setting in which several processes simultaneously share the cache. Recently, Hassidim proposed a model for multi-core paging [25], studying cache eviction policies for multi-cores under the traditional competitive analysis metric and showing that LRU is not competitive against ...
Alejandro López-Ortiz +1 more
openaire +1 more source
An Adaptive Read-Write Partitioning Flash Translation Layer Algorithm
IEEE Access, 2019 The classic demand-based flash translation layer (DFTL) algorithm is well-known since it can solve the contradiction between mapping flexibility and the size of mapping cache by dynamically loading mapping entries.
Yingbiao Yao +5 more
doaj +1 more source