Results 71 to 80 of about 10,280 (293)

Advances in Magnesium‐Based Thermoelectrics: A Critical Review

Advanced Materials, EarlyView.
Magnesium‐based thermoelectric materials have emerged as promising candidates for low‐to‐mid‐temperature energy conversion due to their abundance, low cost, and competitive performance. This review summarizes recent advances in Mg3X2, MgAgSb, and Mg2X systems, covering transport mechanisms, fabrication strategies, stability challenges, and device ...
Li‐Min Zhang, Li Zhang, Nan‐Hai Li, Yan‐Ling Yang, Xiao‐Lei Shi, Zhi‐Gang Chen   +5 more
wiley   +1 more source

Integrated Circuits Parasitic Capacitance Extraction Using Machine Learning and its Application to Layout Optimization [PDF]

, 2022
The impact of parasitic elements on the overall circuit performance keeps increasing from one technology generation to the next. In advanced process nodes, the parasitic effects dominate the overall circuit performance.
Saleh, Mohamed Saleh Abouelyazid
core   +1 more source

Steric Coordination Modulated Iodine Chemistry With Four‐Electron Conversion for Zinc‐Iodine Batteries

Advanced Materials, EarlyView.
A dual‐additive electrolyte strategy is developed to address the hydrolysis of I+ in the aqueous electrolytes. The steric‐hindrance effect of TES− effectively shields I+ from nucleophilic attacks by hydroxyl groups, facilitating the reversible I−/I0/I+ conversion with four‐electron transfer.
Shuai Wang, Haoran Wang, Yujue Yang, Yuanyuan Gao, Yaopeng Wu, Junze Zhang, Jingxin Zhao, Yuejiao Chen, Bingang Xu   +8 more
wiley   +1 more source

Analyses of parasitic capacitance effects and flicker noise of the DAC capacitor array for high resolution SAR ADCs [PDF]

, 2018
Copyright © 2018 Inderscience Enterprises Ltd. This paper analyses the effects of parasitic capacitances of unit capacitors on the accuracy and the noise performance of the DAC capacitor array in a SAR ADC, showing that thermal noise of the array ...
Yue, Xicai, McLeod, Chris, Kiely, Janice
core   +1 more source

Strengthened Interfacial Coupling Between Self‐Assembled Monolayers and Bulk Heterojunctions Enables Thermally Stable Organic Solar Cells

Advanced Materials, EarlyView.
Molecularly engineered self‐assembled monolayers (SAMs) featuring extended conjugated terminals facilitate superior interfacial coupling with the organic solar cell active layer. By physically anchoring the local morphology, this design suppresses thermal degradation, allowing devices to operate at 85°C for 150 h before degrading to 90% of their ...
Gengxin Du, Zhihong Wang, Songyang Yuan, Wenlin Jiang, Shanchao Ouyang, Chengda Ge, Tian Xia, Yiting Jiang, Nan Zhang, Yidan An, Lingyi Ke, Sai Wing Tsang, Francis R. Lin, Qian Li, Alex K.‐Y. Jen, Xuechen Jiao, Yong Zhang, Hin‐Lap Yip   +17 more
wiley   +1 more source

The Parasitic Capacitance of Magnetic Components with Ferrite Cores Due to Time-Varying Electromagnetic (EM) Field [PDF]

, 2018
The parasitic capacitance of a magnetic component, such as an inductor and a transformer, is critical because it can determine component's high frequency impedance, leading to voltage / current spikes, and causing EMI issue.
Lin, Q, Li, Y, Zhao, H, ,, Wang, S
core  

Ferroelectric Dynamic‐Field‐Driven Nucleation and Growth Model for Predictive Materials‐To‐Circuit Co‐Design

Advanced Materials, EarlyView.
This study presents a compact dynamic‐field‐driven nucleation and growth (DFNG) model that captures ferroelectric switching behavior under arbitrary voltage waveforms. It enables extraction of time‐dependent domain wall velocity and growth dimensionality, which can then be extended to device‐level modeling.
Yi Liang, Soohyeon Kim, Tony Chiang, Megan K. Lenox, Ian Mercer, John J. Plombon, Jon‐Paul Maria, Jon F. Ihlefeld, Wenhao Sun, Wei Lu, John T. Heron   +10 more
wiley   +1 more source

Parasitic Capacitance in Nanosheet FETs: Extraction of Different Components and Their Analytical Modeling [PDF]

This work presents an approach to extract and analytically model the components of the parasitic capacitance in the Nanosheet FETs. The model comprehensively accounts for parallel, fringing, and junction capacitance between the gate and the source/drain.
Maheshwari, Om, Mohapatra, Nihar R., Singh, Aishwarya   +2 more
core   +1 more source

A segmentation layout guarding technique to mitigate parasitic capacitance of integrated resistors [PDF]

, 2017
Within integrated circuit design, parasitic capacitance associated with the realisation of a resistor can limit circuit performance for certain applications, such as the analogue-to-digital converter.
Zhou, Zhijun, Paul Warr, Zhijun Zhou, Warr, Paul   +3 more
core   +1 more source

Two-port equivalent circuit model for UHVDC converter valves

CSEE Journal of Power and Energy Systems, 2019
UHVDC converter valves during operation may experience overvoltage, which come from the AC or DC systems to which they are connected. Therefore, building an equivalent circuit model (ECM) for the converter valve to analyze the interlayer transient ...
Ning Chen, Lei Qi, Yi Tang, Cuiyu Zhao, Xiang Cui, Chong Gao   +5 more
doaj   +1 more source