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Comparative analysis of solar still with and without use of coating of waste toner powder on absorber plate and hyperbolic fins. [PDF]
Sci RepBoka P +5 more
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Microscopic pore controls on seepage behavior in varied coal structures based on dual-scale digital core analysis. [PDF]
Sci RepZhou H, Li S, Xiao R, Zhong G, Feng P.
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A Proteochemometric Model for Ligands of the SLC5 Transporter Family. [PDF]
Arch Pharm (Weinheim)Juhás M, Ecker G.
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IEEE Transactions on Communications, 1979
A one-chip PCM codec circuit has been implemented in the CMOS process. The design uses two separate linear digital-digital-to-analog converters, made with charge redistribution techniques. Experimental results show the circuit to meet accepted requirements and operate with very low power requirements.
K.B. Ohri, M.J. Callahan
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A one-chip PCM codec circuit has been implemented in the CMOS process. The design uses two separate linear digital-digital-to-analog converters, made with charge redistribution techniques. Experimental results show the circuit to meet accepted requirements and operate with very low power requirements.
K.B. Ohri, M.J. Callahan
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Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015
Phase Change Memory (PCM) has better scalability and smaller cell size comparing to DRAM. However, further scaling PCM cell in deep sub-micron regime results in significant thermal based write disturbance (WD). Naively allocating large inter-cell space increases cell size from 4F 2 ideal to 12F 2
Rujia Wang +3 more
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Phase Change Memory (PCM) has better scalability and smaller cell size comparing to DRAM. However, further scaling PCM cell in deep sub-micron regime results in significant thermal based write disturbance (WD). Naively allocating large inter-cell space increases cell size from 4F 2 ideal to 12F 2
Rujia Wang +3 more
openaire +1 more source
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
PCM is a promising non-volatile memory technology, as it can offer a unique trade-off-between density and latency compared with DRAM and flash memory. Albeit PCM is much faster than flash memory, it is still notably slower than DRAM, which can significantly degrade system performance.
Nam Sung Kim +4 more
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PCM is a promising non-volatile memory technology, as it can offer a unique trade-off-between density and latency compared with DRAM and flash memory. Albeit PCM is much faster than flash memory, it is still notably slower than DRAM, which can significantly degrade system performance.
Nam Sung Kim +4 more
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Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014
Multi-level Cell (MLC) Phase Change Memory (PCM) has many attractive features to be used as main memory for embedded systems. These features include low power, high density, and better scalability. However, there are also two drawbacks in MLC PCM, namely, limited write endurance and expensive write operation, that need to be overcome in order to ...
Chen Pan +4 more
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Multi-level Cell (MLC) Phase Change Memory (PCM) has many attractive features to be used as main memory for embedded systems. These features include low power, high density, and better scalability. However, there are also two drawbacks in MLC PCM, namely, limited write endurance and expensive write operation, that need to be overcome in order to ...
Chen Pan +4 more
openaire +1 more source