Results 11 to 20 of about 4,808,695 (292)
Electronics Letters, 2022 A novel frequency‐to‐voltage converter based phase‐locked loop (PLL) is proposed to overcome the inability of a frequency‐to‐voltage converter based frequency‐locked loop to lock phase.
Z. M. Saifullah +3 more
doaj +2 more sources
, 2006 This patent presents a new Phase Locked Loop architecture named 'Composite PLL', which provides enhanced characteristics in terms of bandwidth and acquisition ...
BADETS FRANCK +5 more
openaire +4 more sources
Phase Locked Loop Test Methodology [PDF]
, 2008 Phase locked loops are incorporated into almost every large-scale mixed signal and digital system on chip (SOC). Various types of PLL architectures exist including fully analogue, fully digital, semi-digital, and software based.
Burbidge, Martin, Richardson, Andrew
core +4 more sources
Noise performance of frequency- and phase-locked CW magnetrons operated as current-controlled oscillators. [PDF]
, 2005 Low-power continuous wave ``cooker'' magnetrons driven from industrial-quality switch-mode power supplies have been frequency locked by driving them as current-controlled oscillators in a phase-lock loop (PLL).
Carter, Richard G. +2 more
core +3 more sources
A compressive phase-locked loop [PDF]
2012 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2012 We develop a new method for tracking narrowband signals acquired via compressive sensing. The compressive sensing phase-locked loop (CS-PLL) enables one to track oscillating signals in very large bandwidths using sub-Nyquist sampling. A key feature of the approach is the fact that we perform the frequency tracking directly on the compressive ...
Stephen R. Schnelle +4 more
openaire +2 more sources
Output-jitter performance of second-order digital bang-bang phase-locked loops with nonaccumulative reference clock jitter [PDF]
, 2011 Bang-bang phase-locked loops (BBPLLs) are inherently nonlinear systems due to the binary phase detector (BPD). While they are typically used for clock and data recovery, the ongoing trend toward digital loop implementations has resulted in several ...
Tertinek, Stefan +3 more
core +1 more source
Fully Digital Grid Synchronization Under Harmonics and Unbalanced Conditions
IEEE Access, 2019 For the grid-connected system, the unbalanced and harmonic components of three-phase grid voltage have a significant impact on the accuracy of grid synchronization.
Yu Bai +3 more
doaj +1 more source
Techniques for automatic on chip closed loop transfer function monitoring for embedded charge pump phase locked loops. [PDF]
, 2003 Charge Pump Phase locked loops are used in a variety of applications, including on chip clock synthesis, symbol timing recovery for serial data streams, and generation of frequency agile high frequency carrier signals.
Burbidge, Martin J. +2 more
core +4 more sources
Robust optical injection locking to a 250 MHz frequency comb without narrow-band optical pre-filtering [PDF]
, 2011 A semiconductor laser was injection locked to a single optical frequency comb mode with a dither-free phase locked loop.
Wu, D.S. +3 more
core +2 more sources
Design of all-digital phase-locked loop based on pipeline technology
Dianzi Jishu Yingyong, 2019 In order to improve the system of full digital phase-locked loop speed, reduce the power consumption of the system, and at the same time improve the dynamic performance and steady-state performance of phase-locked system,this paper proposes a full ...
Tian Fan, Yang Mengwei, Shan Changhong
doaj +1 more source