Results 271 to 280 of about 319,225 (348)
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1991
A phase-locked loop (PLL) is an electronic system which synchronizes an internal oscillator, in frequency and phase, with an external signal. As brought out below, the PLL is extremely useful for signal processing and signal synthesis [41]. PLLs have been used extensively in the electronic tuning of radios and in the signal processing within TVs. Today,
Donald O. Pederson, Kartikeya Mayaram
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A phase-locked loop (PLL) is an electronic system which synchronizes an internal oscillator, in frequency and phase, with an external signal. As brought out below, the PLL is extremely useful for signal processing and signal synthesis [41]. PLLs have been used extensively in the electronic tuning of radios and in the signal processing within TVs. Today,
Donald O. Pederson, Kartikeya Mayaram
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2018 IEEE Energy Conversion Congress and Exposition (ECCE), 2018
This paper proposes a new form of phase-locked loop (PLL) for improved synchronization of three-phase power converters with the grid, including applications operating at low ratios of sampling-to-fundamental frequency. First, a linear phase detector (PD) concept is introduced, enabling the construction of a new linear PLL (L-PLL).
Vlatko Miskovic +4 more
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This paper proposes a new form of phase-locked loop (PLL) for improved synchronization of three-phase power converters with the grid, including applications operating at low ratios of sampling-to-fundamental frequency. First, a linear phase detector (PD) concept is introduced, enabling the construction of a new linear PLL (L-PLL).
Vlatko Miskovic +4 more
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2012
Arguably the most important circuit in modern electronics is a PLL. A PLL is embedded into virtually every piece of modern electronic equipment: computers, wireless communication systems, and test equipment, to name a few. What is more, each of the subsystem blocks inside these systems may contain their own PLL sub-circuit manufactured in an IC ...
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Arguably the most important circuit in modern electronics is a PLL. A PLL is embedded into virtually every piece of modern electronic equipment: computers, wireless communication systems, and test equipment, to name a few. What is more, each of the subsystem blocks inside these systems may contain their own PLL sub-circuit manufactured in an IC ...
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2002
In this chapter we describe an important electronic circuit, the phase-locked loop (PLL). We first investigate the circuit’s dynamics without and with random perturbations, but in the absence of external forcing. Then we analyze the response of the circuit to noisy external signals, and we describe a method for extracting signals from the result.
Anatoli V. Skorokhod +2 more
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In this chapter we describe an important electronic circuit, the phase-locked loop (PLL). We first investigate the circuit’s dynamics without and with random perturbations, but in the absence of external forcing. Then we analyze the response of the circuit to noisy external signals, and we describe a method for extracting signals from the result.
Anatoli V. Skorokhod +2 more
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ICASSP '78. IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005
This paper deals with the design, construction and evaluation of a Digital Phase-Locked Loop. An exclusive OR gate serves as a linear phase detector. The integrator consists of a cascade of up/down decade counters. The D.C. value of each cycle from the phase detector is measured and accumulated. The rate of integration is determined by the clock input.
C. Reddy, E. Fountain
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This paper deals with the design, construction and evaluation of a Digital Phase-Locked Loop. An exclusive OR gate serves as a linear phase detector. The integrator consists of a cascade of up/down decade counters. The D.C. value of each cycle from the phase detector is measured and accumulated. The rate of integration is determined by the clock input.
C. Reddy, E. Fountain
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Novel phase-locked loops with enhanced locking capabilities
Proceedings of the 2002 American Control Conference (IEEE Cat. No.CH37301), 2001In the paper, a novel phase-locked loop (PLL) is introduced. The proposed PLL, denoted by NPLL, is similar to the standard PLL except that it incorporates a nonlinear element and a low pass filter in its loop. The NPLL outperforms the standard PLL: (i) it has a large acquisition range, i.e., it can achieve locking in situations where the standard PLL ...
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2015
One of the most challenging tasks in analog circuit design is to adapt a functional block to ever-new CMOS process technologies. For digital circuits, the number of gates per square milimeter approximately doubles per chip generation. Integration of analog parts in recent deep submicron technologies is much more difficult and additionally complicated ...
Basab Bijoy Purkayastha +1 more
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One of the most challenging tasks in analog circuit design is to adapt a functional block to ever-new CMOS process technologies. For digital circuits, the number of gates per square milimeter approximately doubles per chip generation. Integration of analog parts in recent deep submicron technologies is much more difficult and additionally complicated ...
Basab Bijoy Purkayastha +1 more
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IETE Journal of Education, 2011
AbstractThe paper describes the phase locked loop (PLL) in detail. Emphasis is on Digital Phase Locked loops (DPLL) and All-Digital Phase Locked Loops (ADPLL). Important parameters of the PLLs are described. Different sub-blocks of DPLL and ADPLL are described and discussed in detail. An example design of ADPLL is also discussed.
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AbstractThe paper describes the phase locked loop (PLL) in detail. Emphasis is on Digital Phase Locked loops (DPLL) and All-Digital Phase Locked Loops (ADPLL). Important parameters of the PLLs are described. Different sub-blocks of DPLL and ADPLL are described and discussed in detail. An example design of ADPLL is also discussed.
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IEE Colloquium on Phase Lock Loops: Theory and Practice, 1999
This paper discusses the design and implementation of a current-mode phase-locked loop (PLL) using translinear and log-domain circuits. The paper illustrates the use of 'log-domain state space' design equations for both the synthesis and analysis of the log-domain sub-circuits within the complete PLL architecture.
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This paper discusses the design and implementation of a current-mode phase-locked loop (PLL) using translinear and log-domain circuits. The paper illustrates the use of 'log-domain state space' design equations for both the synthesis and analysis of the log-domain sub-circuits within the complete PLL architecture.
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